mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 18:26:36 +07:00
751f7e999a
Add cpuidle support for i.MX6SL, currently only support
two cpuidle levels(ARM wfi and WAIT mode), and add software
workaround for WAIT mode errata as below:
ERR005311 CCM: After exit from WAIT mode, unwanted interrupt(s) taken
during WAIT mode entry process could cause cache memory
corruption.
Software workaround:
To prevent this issue from occurring, software should ensure that
the ARM to IPG clock ratio is less than 12:5 (that is < 2.4x), before
entering WAIT mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
31 lines
696 B
C
31 lines
696 B
C
/*
|
|
* Copyright 2012 Freescale Semiconductor, Inc.
|
|
* Copyright 2012 Linaro Ltd.
|
|
*
|
|
* The code contained herein is licensed under the GNU General Public
|
|
* License. You may obtain a copy of the GNU General Public License
|
|
* Version 2 or later at the following locations:
|
|
*
|
|
* http://www.opensource.org/licenses/gpl-license.html
|
|
* http://www.gnu.org/copyleft/gpl.html
|
|
*/
|
|
|
|
#ifdef CONFIG_CPU_IDLE
|
|
extern int imx5_cpuidle_init(void);
|
|
extern int imx6q_cpuidle_init(void);
|
|
extern int imx6sl_cpuidle_init(void);
|
|
#else
|
|
static inline int imx5_cpuidle_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline int imx6q_cpuidle_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline int imx6sl_cpuidle_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|