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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b4f173752a
Tegra20 HW appears to have a bug such that PCIe device interrupts, whether they are legacy IRQs or MSI, are lost when LP2 is enabled. To work around this, simply disable LP2 if any PCIe devices with interrupts are present. Detect this via the IRQ domain map operation. This is slightly over-conservative; if a device with an interrupt is present but the driver does not actually use them, LP2 will still be disabled. However, this is a reasonable trade-off which enables a simpler workaround. Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/*
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* arch/arm/mach-tegra/cpuidle.c
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*
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* CPU idle driver for Tegra CPUs
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*
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* Copyright (c) 2010-2012, NVIDIA Corporation.
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* Copyright (c) 2011 Google, Inc.
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* Author: Colin Cross <ccross@android.com>
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* Gary King <gking@nvidia.com>
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*
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* Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include "fuse.h"
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#include "cpuidle.h"
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void __init tegra_cpuidle_init(void)
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{
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switch (tegra_chip_id) {
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case TEGRA20:
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if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
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tegra20_cpuidle_init();
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break;
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case TEGRA30:
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if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC))
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tegra30_cpuidle_init();
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break;
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case TEGRA114:
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if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC))
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tegra114_cpuidle_init();
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break;
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}
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}
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void tegra_cpuidle_pcie_irqs_in_use(void)
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{
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switch (tegra_chip_id) {
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case TEGRA20:
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if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
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tegra20_cpuidle_pcie_irqs_in_use();
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break;
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}
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}
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