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cfc77c2fba
Otherwise the PF and VF can disagree on the VF's MAC address and this leads to strange behaviour, up to and including kernel panics. Signed-off-by: Shradha Shah <sshah@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
80 lines
3.1 KiB
C
80 lines
3.1 KiB
C
/****************************************************************************
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* Driver for Solarflare network controllers and boards
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* Copyright 2015 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#ifndef SIENA_SRIOV_H
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#define SIENA_SRIOV_H
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#include "net_driver.h"
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/* On the SFC9000 family each port is associated with 1 PCI physical
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* function (PF) handled by sfc and a configurable number of virtual
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* functions (VFs) that may be handled by some other driver, often in
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* a VM guest. The queue pointer registers are mapped in both PF and
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* VF BARs such that an 8K region provides access to a single RX, TX
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* and event queue (collectively a Virtual Interface, VI or VNIC).
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*
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* The PF has access to all 1024 VIs while VFs are mapped to VIs
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* according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
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* in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
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* The number of VIs and the VI_SCALE value are configurable but must
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* be established at boot time by firmware.
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*/
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/* Maximum VI_SCALE parameter supported by Siena */
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#define EFX_VI_SCALE_MAX 6
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/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
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* so this is the smallest allowed value.
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*/
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#define EFX_VI_BASE 128U
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/* Maximum number of VFs allowed */
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#define EFX_VF_COUNT_MAX 127
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/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
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#define EFX_MAX_VF_EVQ_SIZE 8192UL
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/* The number of buffer table entries reserved for each VI on a VF */
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#define EFX_VF_BUFTBL_PER_VI \
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((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
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sizeof(efx_qword_t) / EFX_BUF_SIZE)
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int efx_siena_sriov_configure(struct efx_nic *efx, int num_vfs);
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int efx_siena_sriov_init(struct efx_nic *efx);
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void efx_siena_sriov_fini(struct efx_nic *efx);
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int efx_siena_sriov_mac_address_changed(struct efx_nic *efx);
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bool efx_siena_sriov_wanted(struct efx_nic *efx);
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void efx_siena_sriov_reset(struct efx_nic *efx);
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void efx_siena_sriov_flr(struct efx_nic *efx, unsigned flr);
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int efx_siena_sriov_set_vf_mac(struct efx_nic *efx, int vf, u8 *mac);
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int efx_siena_sriov_set_vf_vlan(struct efx_nic *efx, int vf,
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u16 vlan, u8 qos);
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int efx_siena_sriov_set_vf_spoofchk(struct efx_nic *efx, int vf,
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bool spoofchk);
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int efx_siena_sriov_get_vf_config(struct efx_nic *efx, int vf,
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struct ifla_vf_info *ivf);
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#ifdef CONFIG_SFC_SRIOV
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static inline bool efx_siena_sriov_enabled(struct efx_nic *efx)
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{
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return efx->vf_init_count != 0;
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}
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#else /* !CONFIG_SFC_SRIOV */
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static inline bool efx_siena_sriov_enabled(struct efx_nic *efx)
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{
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return false;
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}
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#endif /* CONFIG_SFC_SRIOV */
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void efx_siena_sriov_probe(struct efx_nic *efx);
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void efx_siena_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
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void efx_siena_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
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void efx_siena_sriov_event(struct efx_channel *channel, efx_qword_t *event);
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void efx_siena_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
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#endif /* SIENA_SRIOV_H */
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