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TILER is a block in OMAP4's DMM which lets DSS fetch frames in a rotated manner. Physical memory can be mapped to a portion of OMAP's system address space called TILER address space. The TILER address space is split into 8 views. Each view represents a rotated or mirrored form of the mapped physical memory. When a DISPC overlay's base address is programmed to one of these views, the TILER fetches the pixels according to the orientation of the view. A view is further split into 4 containers, each container holds elements of a particular size. Rotation can be achieved at the granularity of elements in the container. For more information on TILER, refer to the Memory Subsytem section in OMAP4 TRM. Rotation type TILER has been added which is used to exploit the capabilities of these 8 views for performing various rotations. When fetching from addresses mapped to TILER space, the DISPC DMA can fetch pixels in either 1D or 2D bursts. The fetch depends on which TILER container we are accessing. Accessing 8, 16 and 32 bit sized containers requires 2D bursts, and page mode sized containers require 1D bursts. The DSS2 user is expected to provide the Tiler address of the view that it is interested in. This is passed to the paddr and p_uv_addr parameters in omap_overlay_info. It is also expected to provide the stride value based on the view's orientation and container type, this should be passed to the screen_width parameter of omap_overlay_info. In calc_tiler_rotation_offset screen_width is used to calculate the required row_inc for DISPC. x_predecim and y_predecim are also used to calculate row_inc and pix_inc thereby adding predecimation support for TILER. Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
123 lines
3.5 KiB
C
123 lines
3.5 KiB
C
/*
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* linux/drivers/video/omap2/dss/dss_features.h
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*
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* Copyright (C) 2010 Texas Instruments
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* Author: Archit Taneja <archit@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __OMAP2_DSS_FEATURES_H
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#define __OMAP2_DSS_FEATURES_H
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#if defined(CONFIG_OMAP4_DSS_HDMI)
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#include "ti_hdmi.h"
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#endif
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#define MAX_DSS_MANAGERS 3
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#define MAX_DSS_OVERLAYS 4
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#define MAX_DSS_LCD_MANAGERS 2
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#define MAX_NUM_DSI 2
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/* DSS has feature id */
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enum dss_feat_id {
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FEAT_LCDENABLEPOL,
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FEAT_LCDENABLESIGNAL,
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FEAT_PCKFREEENABLE,
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FEAT_FUNCGATED,
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FEAT_MGR_LCD2,
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FEAT_LINEBUFFERSPLIT,
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FEAT_ROWREPEATENABLE,
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FEAT_RESIZECONF,
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/* Independent core clk divider */
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FEAT_CORE_CLK_DIV,
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FEAT_LCD_CLK_SRC,
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/* DSI-PLL power command 0x3 is not working */
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FEAT_DSI_PLL_PWR_BUG,
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FEAT_DSI_PLL_FREQSEL,
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FEAT_DSI_DCS_CMD_CONFIG_VC,
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FEAT_DSI_VC_OCP_WIDTH,
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FEAT_DSI_REVERSE_TXCLKESC,
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FEAT_DSI_GNQ,
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FEAT_HDMI_CTS_SWMODE,
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FEAT_HDMI_AUDIO_USE_MCLK,
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FEAT_HANDLE_UV_SEPARATE,
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FEAT_ATTR2,
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FEAT_VENC_REQUIRES_TV_DAC_CLK,
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FEAT_CPR,
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FEAT_PRELOAD,
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FEAT_FIR_COEF_V,
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FEAT_ALPHA_FIXED_ZORDER,
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FEAT_ALPHA_FREE_ZORDER,
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FEAT_FIFO_MERGE,
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/* An unknown HW bug causing the normal FIFO thresholds not to work */
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FEAT_OMAP3_DSI_FIFO_BUG,
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FEAT_BURST_2D,
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};
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/* DSS register field id */
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enum dss_feat_reg_field {
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FEAT_REG_FIRHINC,
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FEAT_REG_FIRVINC,
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FEAT_REG_FIFOHIGHTHRESHOLD,
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FEAT_REG_FIFOLOWTHRESHOLD,
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FEAT_REG_FIFOSIZE,
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FEAT_REG_HORIZONTALACCU,
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FEAT_REG_VERTICALACCU,
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FEAT_REG_DISPC_CLK_SWITCH,
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FEAT_REG_DSIPLL_REGN,
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FEAT_REG_DSIPLL_REGM,
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FEAT_REG_DSIPLL_REGM_DISPC,
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FEAT_REG_DSIPLL_REGM_DSI,
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};
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enum dss_range_param {
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FEAT_PARAM_DSS_FCK,
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FEAT_PARAM_DSS_PCD,
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FEAT_PARAM_DSIPLL_REGN,
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FEAT_PARAM_DSIPLL_REGM,
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FEAT_PARAM_DSIPLL_REGM_DISPC,
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FEAT_PARAM_DSIPLL_REGM_DSI,
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FEAT_PARAM_DSIPLL_FINT,
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FEAT_PARAM_DSIPLL_LPDIV,
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FEAT_PARAM_DOWNSCALE,
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FEAT_PARAM_LINEWIDTH,
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FEAT_PARAM_MGR_WIDTH,
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FEAT_PARAM_MGR_HEIGHT,
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};
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/* DSS Feature Functions */
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int dss_feat_get_num_mgrs(void);
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int dss_feat_get_num_ovls(void);
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unsigned long dss_feat_get_param_min(enum dss_range_param param);
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unsigned long dss_feat_get_param_max(enum dss_range_param param);
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enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
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enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
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enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
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bool dss_feat_color_mode_supported(enum omap_plane plane,
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enum omap_color_mode color_mode);
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const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id);
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u32 dss_feat_get_buffer_size_unit(void); /* in bytes */
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u32 dss_feat_get_burst_size_unit(void); /* in bytes */
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bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
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bool dss_has_feature(enum dss_feat_id id);
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void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
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void dss_features_init(void);
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#if defined(CONFIG_OMAP4_DSS_HDMI)
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void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data);
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#endif
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#endif
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