Peter De Schrijver ef6ed2b956 clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation ... Return the actually achieved rate in cfg->output_rate rather than just the requested rate. This is important to make clk_round_rate() return the correct result. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2017-03-20 14:05:46 +01:00
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clk-audio-sync.c	clk: tegra: Remove CLK_IS_ROOT	2016-03-02 17:47:19 -08:00
clk-bpmp.c	clk: tegra: Add BPMP clock driver	2017-02-03 12:36:36 -08:00
clk-dfll.c	PM / OPP: Update OPP users to put reference	2017-01-30 09:22:21 +01:00
clk-dfll.h	clk: tegra: dfll: Properly clean up on failure and removal	2016-04-28 12:41:54 +02:00
clk-divider.c	tegra/clk-divider: fix wrong do_div() usage	2015-11-16 12:37:55 -05:00
clk-emc.c	clk: tegra: Add missing of_node_put()	2016-02-02 15:49:28 +01:00
clk-id.h	clk: tegra: Fix ISP clock modelling	2017-03-20 14:04:45 +01:00
clk-periph-fixed.c	clk: tegra: Add fixed factor peripheral clock type	2016-04-28 12:41:47 +02:00
clk-periph-gate.c	clk: tegra: Constify peripheral clock registers	2016-04-28 12:41:45 +02:00
clk-periph.c	clk: tegra: Constify peripheral clock registers	2016-04-28 12:41:45 +02:00
clk-pll-out.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-pll.c	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
clk-super.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-tegra20.c	treewide: Fix typos in printk	2016-04-28 10:52:28 +02:00
clk-tegra30.c	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
clk-tegra114.c	clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2	2016-08-24 10:54:17 -07:00
clk-tegra124-dfll-fcpu.c	clk: tegra: dfll: Use builtin_platform_driver to simplify the code	2016-11-10 14:08:46 -08:00
clk-tegra124.c	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
clk-tegra210.c	clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation	2017-03-20 14:05:46 +01:00
clk-tegra-audio.c	clk: tegra: Modify tegra_audio_clk_init to accept more plls	2015-10-20 13:56:55 +02:00
clk-tegra-fixed.c	clk: tegra: Remove trailing blank line	2016-04-28 12:41:45 +02:00
clk-tegra-periph.c	clk: tegra: Correct afi clock parent	2017-03-20 14:05:03 +01:00
clk-tegra-pmc.c	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
clk-tegra-super-gen4.c	clk: tegra: super: Fix sparse warnings for functions not declared as static	2016-02-02 15:49:34 +01:00
clk.c	clk: tegra: Changes for v4.7-rc1	2016-05-02 16:53:02 -07:00
clk.h	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
cvb.c	clk: tegra: dfll: improve function-level documentation	2016-11-01 17:38:50 -07:00
cvb.h	clk: tegra: dfll: Properly clean up on failure and removal	2016-04-28 12:41:54 +02:00
Kconfig	clk: tegra: Add BPMP clock driver	2017-02-03 12:36:36 -08:00
Makefile	clk: tegra: Add BPMP clock driver	2017-02-03 12:36:36 -08:00