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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ef41902190
This patch corrects the 15-bit LCDC pin mask definitions to select the five upper lines in each color byte from the LCDC data output. When reducing the color depth the LCDC will start filling MSB and downwards. Also only enable 5 bits per color as the define indicates. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
220 lines
7.6 KiB
C
220 lines
7.6 KiB
C
/*
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* Pin definitions for AT32AP7000.
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*
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* Copyright (C) 2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_AT32AP700X_H__
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#define __ASM_ARCH_AT32AP700X_H__
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#define GPIO_PERIPH_A 0
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#define GPIO_PERIPH_B 1
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/*
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* Pin numbers identifying specific GPIO pins on the chip. They can
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* also be converted to IRQ numbers by passing them through
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* gpio_to_irq().
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*/
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#define GPIO_PIOA_BASE (0)
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#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
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#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
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#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
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#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
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#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
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#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
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#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
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#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
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#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
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/*
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* DMAC peripheral hardware handshaking interfaces, used with dw_dmac
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*/
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#define DMAC_MCI_RX 0
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#define DMAC_MCI_TX 1
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#define DMAC_DAC_TX 2
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#define DMAC_AC97_A_RX 3
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#define DMAC_AC97_A_TX 4
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#define DMAC_AC97_B_RX 5
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#define DMAC_AC97_B_TX 6
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#define DMAC_DMAREQ_0 7
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#define DMAC_DMAREQ_1 8
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#define DMAC_DMAREQ_2 9
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#define DMAC_DMAREQ_3 10
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/* HSB master IDs */
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#define HMATRIX_MASTER_CPU_DCACHE 0
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#define HMATRIX_MASTER_CPU_ICACHE 1
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#define HMATRIX_MASTER_PDC 2
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#define HMATRIX_MASTER_ISI 3
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#define HMATRIX_MASTER_USBA 4
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#define HMATRIX_MASTER_LCDC 5
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#define HMATRIX_MASTER_MACB0 6
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#define HMATRIX_MASTER_MACB1 7
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#define HMATRIX_MASTER_DMACA_M0 8
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#define HMATRIX_MASTER_DMACA_M1 9
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/* HSB slave IDs */
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#define HMATRIX_SLAVE_SRAM0 0
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#define HMATRIX_SLAVE_SRAM1 1
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#define HMATRIX_SLAVE_PBA 2
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#define HMATRIX_SLAVE_PBB 3
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#define HMATRIX_SLAVE_EBI 4
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#define HMATRIX_SLAVE_USBA 5
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#define HMATRIX_SLAVE_LCDC 6
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#define HMATRIX_SLAVE_DMACA 7
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/* Bits in HMATRIX SFR4 (EBI) */
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#define HMATRIX_EBI_SDRAM_ENABLE (1 << 1)
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#define HMATRIX_EBI_NAND_ENABLE (1 << 3)
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#define HMATRIX_EBI_CF0_ENABLE (1 << 4)
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#define HMATRIX_EBI_CF1_ENABLE (1 << 5)
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#define HMATRIX_EBI_PULLUP_DISABLE (1 << 8)
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/*
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* Base addresses of controllers that may be accessed early by
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* platform code.
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*/
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#define PM_BASE 0xfff00000
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#define HMATRIX_BASE 0xfff00800
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#define SDRAMC_BASE 0xfff03800
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/* LCDC on port C */
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#define ATMEL_LCDC_PC_CC (1ULL << 19)
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#define ATMEL_LCDC_PC_HSYNC (1ULL << 20)
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#define ATMEL_LCDC_PC_PCLK (1ULL << 21)
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#define ATMEL_LCDC_PC_VSYNC (1ULL << 22)
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#define ATMEL_LCDC_PC_DVAL (1ULL << 23)
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#define ATMEL_LCDC_PC_MODE (1ULL << 24)
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#define ATMEL_LCDC_PC_PWR (1ULL << 25)
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#define ATMEL_LCDC_PC_DATA0 (1ULL << 26)
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#define ATMEL_LCDC_PC_DATA1 (1ULL << 27)
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#define ATMEL_LCDC_PC_DATA2 (1ULL << 28)
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#define ATMEL_LCDC_PC_DATA3 (1ULL << 29)
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#define ATMEL_LCDC_PC_DATA4 (1ULL << 30)
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#define ATMEL_LCDC_PC_DATA5 (1ULL << 31)
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/* LCDC on port D */
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#define ATMEL_LCDC_PD_DATA6 (1ULL << 0)
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#define ATMEL_LCDC_PD_DATA7 (1ULL << 1)
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#define ATMEL_LCDC_PD_DATA8 (1ULL << 2)
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#define ATMEL_LCDC_PD_DATA9 (1ULL << 3)
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#define ATMEL_LCDC_PD_DATA10 (1ULL << 4)
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#define ATMEL_LCDC_PD_DATA11 (1ULL << 5)
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#define ATMEL_LCDC_PD_DATA12 (1ULL << 6)
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#define ATMEL_LCDC_PD_DATA13 (1ULL << 7)
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#define ATMEL_LCDC_PD_DATA14 (1ULL << 8)
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#define ATMEL_LCDC_PD_DATA15 (1ULL << 9)
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#define ATMEL_LCDC_PD_DATA16 (1ULL << 10)
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#define ATMEL_LCDC_PD_DATA17 (1ULL << 11)
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#define ATMEL_LCDC_PD_DATA18 (1ULL << 12)
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#define ATMEL_LCDC_PD_DATA19 (1ULL << 13)
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#define ATMEL_LCDC_PD_DATA20 (1ULL << 14)
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#define ATMEL_LCDC_PD_DATA21 (1ULL << 15)
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#define ATMEL_LCDC_PD_DATA22 (1ULL << 16)
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#define ATMEL_LCDC_PD_DATA23 (1ULL << 17)
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/* LCDC on port E */
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#define ATMEL_LCDC_PE_CC (1ULL << (32 + 0))
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#define ATMEL_LCDC_PE_DVAL (1ULL << (32 + 1))
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#define ATMEL_LCDC_PE_MODE (1ULL << (32 + 2))
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#define ATMEL_LCDC_PE_DATA0 (1ULL << (32 + 3))
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#define ATMEL_LCDC_PE_DATA1 (1ULL << (32 + 4))
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#define ATMEL_LCDC_PE_DATA2 (1ULL << (32 + 5))
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#define ATMEL_LCDC_PE_DATA3 (1ULL << (32 + 6))
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#define ATMEL_LCDC_PE_DATA4 (1ULL << (32 + 7))
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#define ATMEL_LCDC_PE_DATA8 (1ULL << (32 + 8))
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#define ATMEL_LCDC_PE_DATA9 (1ULL << (32 + 9))
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#define ATMEL_LCDC_PE_DATA10 (1ULL << (32 + 10))
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#define ATMEL_LCDC_PE_DATA11 (1ULL << (32 + 11))
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#define ATMEL_LCDC_PE_DATA12 (1ULL << (32 + 12))
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#define ATMEL_LCDC_PE_DATA16 (1ULL << (32 + 13))
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#define ATMEL_LCDC_PE_DATA17 (1ULL << (32 + 14))
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#define ATMEL_LCDC_PE_DATA18 (1ULL << (32 + 15))
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#define ATMEL_LCDC_PE_DATA19 (1ULL << (32 + 16))
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#define ATMEL_LCDC_PE_DATA20 (1ULL << (32 + 17))
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#define ATMEL_LCDC_PE_DATA21 (1ULL << (32 + 18))
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#define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN)
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#define ATMEL_LCDC_PRI_24B_DATA ( \
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ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \
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ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
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ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
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ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
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ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \
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ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
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ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \
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ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
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ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) | \
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ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \
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ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \
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ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
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#define ATMEL_LCDC_ALT_24B_DATA ( \
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ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \
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ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
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ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
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ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
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ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \
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ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
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ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \
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ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
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ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) | \
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ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \
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ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \
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ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
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#define ATMEL_LCDC_PRI_15B_DATA ( \
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ATMEL_LCDC(PC, DATA3) | ATMEL_LCDC(PC, DATA4) | \
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ATMEL_LCDC(PC, DATA5) | ATMEL_LCDC(PD, DATA6) | \
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ATMEL_LCDC(PD, DATA7) | \
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ATMEL_LCDC(PD, DATA11) | ATMEL_LCDC(PD, DATA12) | \
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ATMEL_LCDC(PD, DATA13) | ATMEL_LCDC(PD, DATA14) | \
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ATMEL_LCDC(PD, DATA15) | \
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ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20) | \
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ATMEL_LCDC(PD, DATA21) | ATMEL_LCDC(PD, DATA22) | \
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ATMEL_LCDC(PD, DATA23))
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#define ATMEL_LCDC_ALT_15B_DATA ( \
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ATMEL_LCDC(PE, DATA3) | ATMEL_LCDC(PE, DATA4) | \
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ATMEL_LCDC(PC, DATA5) | ATMEL_LCDC(PD, DATA6) | \
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ATMEL_LCDC(PD, DATA7) | \
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ATMEL_LCDC(PE, DATA11) | ATMEL_LCDC(PE, DATA12) | \
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ATMEL_LCDC(PD, DATA13) | ATMEL_LCDC(PD, DATA14) | \
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ATMEL_LCDC(PD, DATA15) | \
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ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20) | \
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ATMEL_LCDC(PE, DATA21) | ATMEL_LCDC(PD, DATA22) | \
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ATMEL_LCDC(PD, DATA23))
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#define ATMEL_LCDC_PRI_CONTROL ( \
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ATMEL_LCDC(PC, CC) | ATMEL_LCDC(PC, DVAL) | \
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ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR))
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#define ATMEL_LCDC_ALT_CONTROL ( \
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ATMEL_LCDC(PE, CC) | ATMEL_LCDC(PE, DVAL) | \
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ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR))
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#define ATMEL_LCDC_CONTROL ( \
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ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) | \
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ATMEL_LCDC(PC, PCLK))
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#define ATMEL_LCDC_PRI_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA)
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#define ATMEL_LCDC_ALT_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA)
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#define ATMEL_LCDC_PRI_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA)
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#define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
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/* Bitmask for all EBI data (D16..D31) pins on port E */
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#define ATMEL_EBI_PE_DATA_ALL (0x0000FFFF)
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#endif /* __ASM_ARCH_AT32AP700X_H__ */
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