mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-22 08:44:23 +07:00
2981dcf333
- Atomics-related code sees some rework & cleanup, most notably allowing Loongson LL/SC errata workarounds to be more bulletproof & their correctness to be checked at build time. - Command line setup code is simplified somewhat, resolving various corner cases. - MIPS kernels can now be built with kcov code coverage support. - We can now build with CONFIG_FORTIFY_SOURCE=y. - Miscellaneous cleanups. And some platform specific changes: - We now disable some broken TLB functionality on certain Ingenic systems, and JZ4780 systems gain some devicetree nodes to support more devices. - Loongson support sees a number of cleanups, and we gain initial support for Loongson 3A R4 systems. - We gain support for MediaTek MT7688-based GARDENA Smart Gateway systems. - SGI IP27 (Origin 2*) see a number of fixes, cleanups & simplifications. - SGI IP30 (Octane) systems are now supported. -----BEGIN PGP SIGNATURE----- iIwEABYIADQWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXdwj2RYccGF1bGJ1cnRv bkBrZXJuZWwub3JnAAoJED6nn6y1dQDd54QA/2CrWLcWCcWVwN8XwLTh3gWf8/k7 d19Ttd0bYrsBUnaHAP9s9kc9RFOAhB3p1G0dsMZqI0YX7emLGPgW3ejJ7CXNCg== =/Hsa -----END PGP SIGNATURE----- Merge tag 'mips_5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Paul Burton: "The main MIPS changes for 5.5: - Atomics-related code sees some rework & cleanup, most notably allowing Loongson LL/SC errata workarounds to be more bulletproof & their correctness to be checked at build time. - Command line setup code is simplified somewhat, resolving various corner cases. - MIPS kernels can now be built with kcov code coverage support. - We can now build with CONFIG_FORTIFY_SOURCE=y. - Miscellaneous cleanups. And some platform specific changes: - We now disable some broken TLB functionality on certain Ingenic systems, and JZ4780 systems gain some devicetree nodes to support more devices. - Loongson support sees a number of cleanups, and we gain initial support for Loongson 3A R4 systems. - We gain support for MediaTek MT7688-based GARDENA Smart Gateway systems. - SGI IP27 (Origin 2*) see a number of fixes, cleanups & simplifications. - SGI IP30 (Octane) systems are now supported" * tag 'mips_5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (107 commits) MIPS: SGI-IP27: Enable ethernet phy on second Origin 200 module MIPS: PCI: Fix fake subdevice ID for IOC3 MIPS: Ingenic: Disable abandoned HPTLB function. MIPS: PCI: remember nasid changed by set interrupt affinity MIPS: SGI-IP27: Fix crash, when CPUs are disabled via nr_cpus parameter mips: add support for folded p4d page tables mips: drop __pXd_offset() macros that duplicate pXd_index() ones mips: fix build when "48 bits virtual memory" is enabled MIPS: math-emu: Reuse name array in debugfs_fpuemu() MIPS: allow building with kcov coverage MIPS: Loongson64: Drop setup_pcimap MIPS: Loongson2ef: Convert to early_printk_8250 MIPS: Drop CPU_SUPPORTS_UNCACHED_ACCELERATED MIPS: Loongson{2ef, 32, 64} convert to generic fw cmdline MIPS: Drop pmon.h MIPS: Loongson: Unify LOONGSON3/LOONGSON64 Kconfig usage MIPS: Loongson: Rename LOONGSON1 to LOONGSON32 MIPS: Loongson: Fix return value of loongson_hwmon_init MIPS: add support for SGI Octane (IP30) MIPS: PCI: make phys_to_dma/dma_to_phys for pci-xtalk-bridge common ...
168 lines
3.9 KiB
C
168 lines
3.9 KiB
C
/*
|
|
* This file is subject to the terms and conditions of the GNU General
|
|
* Public License. See the file "COPYING" in the main directory of this
|
|
* archive for more details.
|
|
*
|
|
* Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
|
|
* Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
|
|
*/
|
|
#include <linux/kernel.h>
|
|
#include <linux/init.h>
|
|
#include <linux/sched.h>
|
|
#include <linux/smp.h>
|
|
#include <linux/mm.h>
|
|
#include <linux/export.h>
|
|
#include <linux/cpumask.h>
|
|
#include <asm/bootinfo.h>
|
|
#include <asm/cpu.h>
|
|
#include <asm/io.h>
|
|
#include <asm/pgtable.h>
|
|
#include <asm/sgialib.h>
|
|
#include <asm/time.h>
|
|
#include <asm/sn/types.h>
|
|
#include <asm/sn/sn0/addrs.h>
|
|
#include <asm/sn/sn0/hubni.h>
|
|
#include <asm/sn/sn0/hubio.h>
|
|
#include <asm/sn/klconfig.h>
|
|
#include <asm/sn/ioc3.h>
|
|
#include <asm/mipsregs.h>
|
|
#include <asm/sn/gda.h>
|
|
#include <asm/sn/hub.h>
|
|
#include <asm/sn/intr.h>
|
|
#include <asm/current.h>
|
|
#include <asm/processor.h>
|
|
#include <asm/mmu_context.h>
|
|
#include <asm/thread_info.h>
|
|
#include <asm/sn/launch.h>
|
|
#include <asm/sn/sn_private.h>
|
|
#include <asm/sn/sn0/ip27.h>
|
|
#include <asm/sn/mapped_kernel.h>
|
|
|
|
#include "ip27-common.h"
|
|
|
|
#define CPU_NONE (cpuid_t)-1
|
|
|
|
static DECLARE_BITMAP(hub_init_mask, MAX_NUMNODES);
|
|
nasid_t master_nasid = INVALID_NASID;
|
|
|
|
struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
|
|
EXPORT_SYMBOL_GPL(sn_cpu_info);
|
|
|
|
static void per_hub_init(nasid_t nasid)
|
|
{
|
|
struct hub_data *hub = hub_data(nasid);
|
|
|
|
cpumask_set_cpu(smp_processor_id(), &hub->h_cpus);
|
|
|
|
if (test_and_set_bit(nasid, hub_init_mask))
|
|
return;
|
|
/*
|
|
* Set CRB timeout at 5ms, (< PI timeout of 10ms)
|
|
*/
|
|
REMOTE_HUB_S(nasid, IIO_ICTP, 0x800);
|
|
REMOTE_HUB_S(nasid, IIO_ICTO, 0xff);
|
|
|
|
hub_rtc_init(nasid);
|
|
|
|
if (nasid) {
|
|
/* copy exception handlers from first node to current node */
|
|
memcpy((void *)NODE_OFFSET_TO_K0(nasid, 0),
|
|
(void *)CKSEG0, 0x200);
|
|
__flush_cache_all();
|
|
/* switch to node local exception handlers */
|
|
REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_8K);
|
|
}
|
|
}
|
|
|
|
void per_cpu_init(void)
|
|
{
|
|
int cpu = smp_processor_id();
|
|
int slice = LOCAL_HUB_L(PI_CPU_NUM);
|
|
nasid_t nasid = get_nasid();
|
|
struct hub_data *hub = hub_data(nasid);
|
|
|
|
if (test_and_set_bit(slice, &hub->slice_map))
|
|
return;
|
|
|
|
clear_c0_status(ST0_IM);
|
|
|
|
per_hub_init(nasid);
|
|
|
|
cpu_time_init();
|
|
install_ipi();
|
|
|
|
/* Install our NMI handler if symmon hasn't installed one. */
|
|
install_cpu_nmi_handler(cputoslice(cpu));
|
|
|
|
enable_percpu_irq(IP27_HUB_PEND0_IRQ, IRQ_TYPE_NONE);
|
|
enable_percpu_irq(IP27_HUB_PEND1_IRQ, IRQ_TYPE_NONE);
|
|
}
|
|
|
|
/*
|
|
* get_nasid() returns the physical node id number of the caller.
|
|
*/
|
|
nasid_t
|
|
get_nasid(void)
|
|
{
|
|
return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK)
|
|
>> NSRI_NODEID_SHFT);
|
|
}
|
|
|
|
void __init plat_mem_setup(void)
|
|
{
|
|
u64 p, e, n_mode;
|
|
nasid_t nid;
|
|
|
|
register_smp_ops(&ip27_smp_ops);
|
|
|
|
ip27_reboot_setup();
|
|
|
|
/*
|
|
* hub_rtc init and cpu clock intr enabled for later calibrate_delay.
|
|
*/
|
|
nid = get_nasid();
|
|
printk("IP27: Running on node %d.\n", nid);
|
|
|
|
p = LOCAL_HUB_L(PI_CPU_PRESENT_A) & 1;
|
|
e = LOCAL_HUB_L(PI_CPU_ENABLE_A) & 1;
|
|
printk("Node %d has %s primary CPU%s.\n", nid,
|
|
p ? "a" : "no",
|
|
e ? ", CPU is running" : "");
|
|
|
|
p = LOCAL_HUB_L(PI_CPU_PRESENT_B) & 1;
|
|
e = LOCAL_HUB_L(PI_CPU_ENABLE_B) & 1;
|
|
printk("Node %d has %s secondary CPU%s.\n", nid,
|
|
p ? "a" : "no",
|
|
e ? ", CPU is running" : "");
|
|
|
|
/*
|
|
* Try to catch kernel missconfigurations and give user an
|
|
* indication what option to select.
|
|
*/
|
|
n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK;
|
|
printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M');
|
|
#ifdef CONFIG_SGI_SN_N_MODE
|
|
if (!n_mode)
|
|
panic("Kernel compiled for M mode.");
|
|
#else
|
|
if (n_mode)
|
|
panic("Kernel compiled for N mode.");
|
|
#endif
|
|
|
|
ioport_resource.start = 0;
|
|
ioport_resource.end = ~0UL;
|
|
set_io_port_base(IO_BASE);
|
|
}
|
|
|
|
const char *get_system_type(void)
|
|
{
|
|
return "SGI Origin";
|
|
}
|
|
|
|
void __init prom_init(void)
|
|
{
|
|
prom_init_cmdline(fw_arg0, (LONG *)fw_arg1);
|
|
prom_meminit();
|
|
}
|
|
|