mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
078a55fc82
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0
("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.
Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files. MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
[ralf@linux-mips.org: Folded in Paul's followup fix.]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
275 lines
8.5 KiB
C
275 lines
8.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer
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* Copyright (C) 2005 Maciej W. Rozycki
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* Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/types.h>
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#ifdef CONFIG_EXPORT_UASM
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#include <linux/export.h>
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#define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym)
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#else
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#define UASM_EXPORT_SYMBOL(sym)
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#endif
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#define _UASM_ISA_CLASSIC 0
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#define _UASM_ISA_MICROMIPS 1
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#ifndef UASM_ISA
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#ifdef CONFIG_CPU_MICROMIPS
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#define UASM_ISA _UASM_ISA_MICROMIPS
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#else
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#define UASM_ISA _UASM_ISA_CLASSIC
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#endif
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#endif
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#if (UASM_ISA == _UASM_ISA_CLASSIC)
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#ifdef CONFIG_CPU_MICROMIPS
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#define ISAOPC(op) CL_uasm_i##op
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#define ISAFUNC(x) CL_##x
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#else
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#define ISAOPC(op) uasm_i##op
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#define ISAFUNC(x) x
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#endif
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#elif (UASM_ISA == _UASM_ISA_MICROMIPS)
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#ifdef CONFIG_CPU_MICROMIPS
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#define ISAOPC(op) uasm_i##op
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#define ISAFUNC(x) x
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#else
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#define ISAOPC(op) MM_uasm_i##op
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#define ISAFUNC(x) MM_##x
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#endif
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#else
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#error Unsupported micro-assembler ISA!!!
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#endif
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#define Ip_u1u2u3(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
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#define Ip_u2u1u3(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
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#define Ip_u3u1u2(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c)
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#define Ip_u1u2s3(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
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#define Ip_u2s3u1(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
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#define Ip_u2u1s3(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
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#define Ip_u2u1msbu3(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \
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unsigned int d)
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#define Ip_u1u2(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b)
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#define Ip_u1s2(op) \
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void ISAOPC(op)(u32 **buf, unsigned int a, signed int b)
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#define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a)
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#define Ip_0(op) void ISAOPC(op)(u32 **buf)
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Ip_u2u1s3(_addiu);
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Ip_u3u1u2(_addu);
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Ip_u3u1u2(_and);
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Ip_u2u1u3(_andi);
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Ip_u1u2s3(_bbit0);
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Ip_u1u2s3(_bbit1);
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Ip_u1u2s3(_beq);
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Ip_u1u2s3(_beql);
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Ip_u1s2(_bgez);
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Ip_u1s2(_bgezl);
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Ip_u1s2(_bltz);
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Ip_u1s2(_bltzl);
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Ip_u1u2s3(_bne);
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Ip_u2s3u1(_cache);
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Ip_u2u1s3(_daddiu);
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Ip_u3u1u2(_daddu);
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Ip_u2u1msbu3(_dins);
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Ip_u2u1msbu3(_dinsm);
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Ip_u1u2u3(_dmfc0);
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Ip_u1u2u3(_dmtc0);
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Ip_u2u1u3(_drotr);
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Ip_u2u1u3(_drotr32);
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Ip_u2u1u3(_dsll);
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Ip_u2u1u3(_dsll32);
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Ip_u2u1u3(_dsra);
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Ip_u2u1u3(_dsrl);
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Ip_u2u1u3(_dsrl32);
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Ip_u3u1u2(_dsubu);
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Ip_0(_eret);
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Ip_u2u1msbu3(_ext);
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Ip_u2u1msbu3(_ins);
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Ip_u1(_j);
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Ip_u1(_jal);
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Ip_u1(_jr);
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Ip_u2s3u1(_ld);
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Ip_u3u1u2(_ldx);
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Ip_u2s3u1(_ll);
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Ip_u2s3u1(_lld);
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Ip_u1s2(_lui);
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Ip_u2s3u1(_lw);
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Ip_u3u1u2(_lwx);
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Ip_u1u2u3(_mfc0);
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Ip_u1u2u3(_mtc0);
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Ip_u3u1u2(_or);
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Ip_u2u1u3(_ori);
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Ip_u2s3u1(_pref);
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Ip_0(_rfe);
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Ip_u2u1u3(_rotr);
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Ip_u2s3u1(_sc);
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Ip_u2s3u1(_scd);
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Ip_u2s3u1(_sd);
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Ip_u2u1u3(_sll);
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Ip_u2u1u3(_sra);
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Ip_u2u1u3(_srl);
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Ip_u3u1u2(_subu);
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Ip_u2s3u1(_sw);
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Ip_u1(_syscall);
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Ip_0(_tlbp);
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Ip_0(_tlbr);
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Ip_0(_tlbwi);
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Ip_0(_tlbwr);
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Ip_u3u1u2(_xor);
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Ip_u2u1u3(_xori);
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/* Handle labels. */
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struct uasm_label {
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u32 *addr;
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int lab;
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};
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void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr,
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int lid);
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#ifdef CONFIG_64BIT
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int ISAFUNC(uasm_in_compat_space_p)(long addr);
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#endif
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int ISAFUNC(uasm_rel_hi)(long val);
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int ISAFUNC(uasm_rel_lo)(long val);
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void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr);
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void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr);
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#define UASM_L_LA(lb) \
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static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \
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{ \
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ISAFUNC(uasm_build_label)(lab, addr, label##lb); \
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}
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/* convenience macros for instructions */
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#ifdef CONFIG_64BIT
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# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val)
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# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd)
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# define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off)
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# define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off)
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# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd)
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# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd)
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# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd)
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# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh)
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# define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off)
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# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh)
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# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh)
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# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh)
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# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)
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# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd)
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# define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off)
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#else
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# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val)
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# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd)
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# define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off)
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# define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off)
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# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd)
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# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd)
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# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd)
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# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh)
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# define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off)
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# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh)
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# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh)
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# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
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# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh)
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# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd)
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# define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off)
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#endif
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#define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off)
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#define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off)
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#define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off)
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#define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off)
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#define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off)
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#define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3)
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#define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b)
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#define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0)
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#define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1)
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static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1,
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unsigned int a2, unsigned int a3)
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{
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if (a3 < 32)
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ISAOPC(_drotr)(p, a1, a2, a3);
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else
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ISAOPC(_drotr32)(p, a1, a2, a3 - 32);
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}
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static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1,
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unsigned int a2, unsigned int a3)
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{
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if (a3 < 32)
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ISAOPC(_dsll)(p, a1, a2, a3);
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else
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ISAOPC(_dsll32)(p, a1, a2, a3 - 32);
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}
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static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1,
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unsigned int a2, unsigned int a3)
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{
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if (a3 < 32)
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ISAOPC(_dsrl)(p, a1, a2, a3);
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else
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ISAOPC(_dsrl32)(p, a1, a2, a3 - 32);
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}
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/* Handle relocations. */
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struct uasm_reloc {
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u32 *addr;
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unsigned int type;
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int lab;
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};
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/* This is zero so we can use zeroed label arrays. */
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#define UASM_LABEL_INVALID 0
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void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid);
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void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab);
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void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off);
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void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off);
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void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab,
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u32 *first, u32 *end, u32 *target);
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int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr);
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/* Convenience functions for labeled branches. */
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void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid);
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void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg,
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unsigned int bit, int lid);
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void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg,
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unsigned int bit, int lid);
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void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1,
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unsigned int reg2, int lid);
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void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid);
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