mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 20:40:54 +07:00
eb3d3ec567
Pull ARM updates from Russell King: - Major clean-up of the L2 cache support code. The existing mess was becoming rather unmaintainable through all the additions that others have done over time. This turns it into a much nicer structure, and implements a few performance improvements as well. - Clean up some of the CP15 control register tweaks for alignment support, moving some code and data into alignment.c - DMA properties for ARM, from Santosh and reviewed by DT people. This adds DT properties to specify bus translations we can't discover automatically, and to indicate whether devices are coherent. - Hibernation support for ARM - Make ftrace work with read-only text in modules - add suspend support for PJ4B CPUs - rework interrupt masking for undefined instruction handling, which allows us to enable interrupts earlier in the handling of these exceptions. - support for big endian page tables - fix stacktrace support to exclude stacktrace functions from the trace, and add save_stack_trace_regs() implementation so that kprobes can record stack traces. - Add support for the Cortex-A17 CPU. - Remove last vestiges of ARM710 support. - Removal of ARM "meminfo" structure, finally converting us solely to memblock to handle the early memory initialisation. * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits) ARM: ensure C page table setup code follows assembly code (part II) ARM: ensure C page table setup code follows assembly code ARM: consolidate last remaining open-coded alignment trap enable ARM: remove global cr_no_alignment ARM: remove CPU_CP15 conditional from alignment.c ARM: remove unused adjust_cr() function ARM: move "noalign" command line option to alignment.c ARM: provide common method to clear bits in CPU control register ARM: 8025/1: Get rid of meminfo ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type ARM: 8066/1: correction for ARM patch 8031/2 ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation ARM: 8065/1: remove last use of CONFIG_CPU_ARM710 ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction ARM: 8047/1: rwsem: use asm-generic rwsem implementation ARM: l2c: trial at enabling some Cortex-A9 optimisations ARM: l2c: add warnings for stuff modifying aux_ctrl register values ARM: l2c: print a warning with L2C-310 caches if the cache size is modified ARM: l2c: remove old .set_debug method ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this ...
245 lines
6.0 KiB
C
245 lines
6.0 KiB
C
/*
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* linux/arch/arm/kernel/devtree.c
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*
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* Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/bootmem.h>
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#include <linux/memblock.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/smp.h>
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#include <asm/cputype.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/smp_plat.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#ifdef CONFIG_SMP
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extern struct of_cpu_method __cpu_method_of_table[];
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static const struct of_cpu_method __cpu_method_of_table_sentinel
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__used __section(__cpu_method_of_table_end);
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static int __init set_smp_ops_by_method(struct device_node *node)
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{
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const char *method;
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struct of_cpu_method *m = __cpu_method_of_table;
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if (of_property_read_string(node, "enable-method", &method))
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return 0;
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for (; m->method; m++)
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if (!strcmp(m->method, method)) {
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smp_set_ops(m->ops);
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return 1;
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}
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return 0;
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}
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#else
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static inline int set_smp_ops_by_method(struct device_node *node)
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{
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return 1;
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}
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#endif
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/*
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* arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
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* and builds the cpu logical map array containing MPIDR values related to
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* logical cpus
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*
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* Updates the cpu possible mask with the number of parsed cpu nodes
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*/
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void __init arm_dt_init_cpu_maps(void)
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{
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/*
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* Temp logical map is initialized with UINT_MAX values that are
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* considered invalid logical map entries since the logical map must
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* contain a list of MPIDR[23:0] values where MPIDR[31:24] must
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* read as 0.
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*/
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struct device_node *cpu, *cpus;
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int found_method = 0;
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u32 i, j, cpuidx = 1;
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u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
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u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
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bool bootcpu_valid = false;
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cpus = of_find_node_by_path("/cpus");
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if (!cpus)
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return;
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for_each_child_of_node(cpus, cpu) {
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u32 hwid;
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if (of_node_cmp(cpu->type, "cpu"))
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continue;
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pr_debug(" * %s...\n", cpu->full_name);
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/*
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* A device tree containing CPU nodes with missing "reg"
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* properties is considered invalid to build the
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* cpu_logical_map.
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*/
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if (of_property_read_u32(cpu, "reg", &hwid)) {
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pr_debug(" * %s missing reg property\n",
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cpu->full_name);
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return;
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}
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/*
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* 8 MSBs must be set to 0 in the DT since the reg property
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* defines the MPIDR[23:0].
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*/
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if (hwid & ~MPIDR_HWID_BITMASK)
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return;
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/*
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* Duplicate MPIDRs are a recipe for disaster.
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* Scan all initialized entries and check for
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* duplicates. If any is found just bail out.
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* temp values were initialized to UINT_MAX
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* to avoid matching valid MPIDR[23:0] values.
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*/
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for (j = 0; j < cpuidx; j++)
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if (WARN(tmp_map[j] == hwid, "Duplicate /cpu reg "
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"properties in the DT\n"))
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return;
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/*
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* Build a stashed array of MPIDR values. Numbering scheme
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* requires that if detected the boot CPU must be assigned
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* logical id 0. Other CPUs get sequential indexes starting
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* from 1. If a CPU node with a reg property matching the
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* boot CPU MPIDR is detected, this is recorded so that the
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* logical map built from DT is validated and can be used
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* to override the map created in smp_setup_processor_id().
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*/
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if (hwid == mpidr) {
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i = 0;
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bootcpu_valid = true;
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} else {
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i = cpuidx++;
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}
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if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than "
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"max cores %u, capping them\n",
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cpuidx, nr_cpu_ids)) {
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cpuidx = nr_cpu_ids;
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break;
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}
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tmp_map[i] = hwid;
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if (!found_method)
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found_method = set_smp_ops_by_method(cpu);
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}
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/*
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* Fallback to an enable-method in the cpus node if nothing found in
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* a cpu node.
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*/
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if (!found_method)
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set_smp_ops_by_method(cpus);
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if (!bootcpu_valid) {
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pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n");
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return;
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}
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/*
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* Since the boot CPU node contains proper data, and all nodes have
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* a reg property, the DT CPU list can be considered valid and the
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* logical map created in smp_setup_processor_id() can be overridden
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*/
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for (i = 0; i < cpuidx; i++) {
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set_cpu_possible(i, true);
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cpu_logical_map(i) = tmp_map[i];
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pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i));
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}
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}
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bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
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{
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return phys_id == cpu_logical_map(cpu);
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}
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static const void * __init arch_get_next_mach(const char *const **match)
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{
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static const struct machine_desc *mdesc = __arch_info_begin;
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const struct machine_desc *m = mdesc;
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if (m >= __arch_info_end)
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return NULL;
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mdesc++;
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*match = m->dt_compat;
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return m;
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}
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/**
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* setup_machine_fdt - Machine setup when an dtb was passed to the kernel
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* @dt_phys: physical address of dt blob
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*
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* If a dtb was passed to the kernel in r2, then use it to choose the
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* correct machine_desc and to setup the system.
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*/
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const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
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{
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const struct machine_desc *mdesc, *mdesc_best = NULL;
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#ifdef CONFIG_ARCH_MULTIPLATFORM
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DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
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MACHINE_END
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mdesc_best = &__mach_desc_GENERIC_DT;
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#endif
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if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys)))
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return NULL;
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mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
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if (!mdesc) {
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const char *prop;
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int size;
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unsigned long dt_root;
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early_print("\nError: unrecognized/unsupported "
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"device tree compatible list:\n[ ");
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dt_root = of_get_flat_dt_root();
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prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
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while (size > 0) {
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early_print("'%s' ", prop);
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size -= strlen(prop) + 1;
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prop += strlen(prop) + 1;
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}
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early_print("]\n\n");
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dump_machine_table(); /* does not return */
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}
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/* Change machine number to match the mdesc we're using */
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__machine_arch_type = mdesc->nr;
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return mdesc;
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}
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