mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 18:26:43 +07:00
ee15faffef
We want to put the XO board clocks into the dt files, but we also need to be backwards compatible with an older dtb. Add an API to the common code to do this. This also makes a place for us to handle the case when the RPM clock driver is enabled and we don't want to register the fixed factor clock. Cc: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
259 lines
6.1 KiB
C
259 lines
6.1 KiB
C
/*
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* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/export.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/platform_device.h>
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#include <linux/clk-provider.h>
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#include <linux/reset-controller.h>
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#include <linux/of.h>
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#include "common.h"
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#include "clk-rcg.h"
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#include "clk-regmap.h"
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#include "reset.h"
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#include "gdsc.h"
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struct qcom_cc {
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struct qcom_reset_controller reset;
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struct clk_onecell_data data;
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struct clk *clks[];
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};
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const
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struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
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{
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if (!f)
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return NULL;
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for (; f->freq; f++)
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if (rate <= f->freq)
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return f;
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/* Default to our fastest rate */
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return f - 1;
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}
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EXPORT_SYMBOL_GPL(qcom_find_freq);
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int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
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{
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int i, num_parents = clk_hw_get_num_parents(hw);
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for (i = 0; i < num_parents; i++)
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if (src == map[i].src)
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return i;
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(qcom_find_src_index);
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struct regmap *
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qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
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{
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void __iomem *base;
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struct resource *res;
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struct device *dev = &pdev->dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return ERR_CAST(base);
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return devm_regmap_init_mmio(dev, base, desc->config);
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}
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EXPORT_SYMBOL_GPL(qcom_cc_map);
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static void qcom_cc_del_clk_provider(void *data)
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{
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of_clk_del_provider(data);
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}
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static void qcom_cc_reset_unregister(void *data)
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{
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reset_controller_unregister(data);
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}
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static void qcom_cc_gdsc_unregister(void *data)
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{
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gdsc_unregister(data);
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}
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/*
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* Backwards compatibility with old DTs. Register a pass-through factor 1/1
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* clock to translate 'path' clk into 'name' clk and regsiter the 'path'
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* clk as a fixed rate clock if it isn't present.
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*/
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static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
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const char *name, unsigned long rate,
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bool add_factor)
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{
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struct device_node *node = NULL;
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struct device_node *clocks_node;
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struct clk_fixed_factor *factor;
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struct clk_fixed_rate *fixed;
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struct clk *clk;
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struct clk_init_data init_data = { };
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clocks_node = of_find_node_by_path("/clocks");
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if (clocks_node)
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node = of_find_node_by_name(clocks_node, path);
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of_node_put(clocks_node);
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if (!node) {
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fixed = devm_kzalloc(dev, sizeof(*fixed), GFP_KERNEL);
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if (!fixed)
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return -EINVAL;
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fixed->fixed_rate = rate;
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fixed->hw.init = &init_data;
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init_data.name = path;
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init_data.flags = CLK_IS_ROOT;
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init_data.ops = &clk_fixed_rate_ops;
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clk = devm_clk_register(dev, &fixed->hw);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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}
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of_node_put(node);
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if (add_factor) {
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factor = devm_kzalloc(dev, sizeof(*factor), GFP_KERNEL);
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if (!factor)
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return -EINVAL;
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factor->mult = factor->div = 1;
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factor->hw.init = &init_data;
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init_data.name = name;
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init_data.parent_names = &path;
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init_data.num_parents = 1;
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init_data.flags = 0;
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init_data.ops = &clk_fixed_factor_ops;
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clk = devm_clk_register(dev, &factor->hw);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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}
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return 0;
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}
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int qcom_cc_register_board_clk(struct device *dev, const char *path,
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const char *name, unsigned long rate)
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{
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bool add_factor = true;
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struct device_node *node;
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/* The RPM clock driver will add the factor clock if present */
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if (IS_ENABLED(CONFIG_QCOM_RPMCC)) {
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node = of_find_compatible_node(NULL, NULL, "qcom,rpmcc");
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if (of_device_is_available(node))
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add_factor = false;
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of_node_put(node);
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}
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return _qcom_cc_register_board_clk(dev, path, name, rate, add_factor);
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}
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EXPORT_SYMBOL_GPL(qcom_cc_register_board_clk);
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int qcom_cc_register_sleep_clk(struct device *dev)
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{
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return _qcom_cc_register_board_clk(dev, "sleep_clk", "sleep_clk_src",
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32768, true);
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}
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EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
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int qcom_cc_really_probe(struct platform_device *pdev,
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const struct qcom_cc_desc *desc, struct regmap *regmap)
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{
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int i, ret;
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struct device *dev = &pdev->dev;
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struct clk *clk;
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struct clk_onecell_data *data;
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struct clk **clks;
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struct qcom_reset_controller *reset;
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struct qcom_cc *cc;
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size_t num_clks = desc->num_clks;
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struct clk_regmap **rclks = desc->clks;
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cc = devm_kzalloc(dev, sizeof(*cc) + sizeof(*clks) * num_clks,
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GFP_KERNEL);
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if (!cc)
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return -ENOMEM;
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clks = cc->clks;
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data = &cc->data;
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data->clks = clks;
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data->clk_num = num_clks;
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for (i = 0; i < num_clks; i++) {
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if (!rclks[i]) {
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clks[i] = ERR_PTR(-ENOENT);
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continue;
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}
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clk = devm_clk_register_regmap(dev, rclks[i]);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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clks[i] = clk;
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}
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ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, data);
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if (ret)
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return ret;
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devm_add_action(dev, qcom_cc_del_clk_provider, pdev->dev.of_node);
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reset = &cc->reset;
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reset->rcdev.of_node = dev->of_node;
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reset->rcdev.ops = &qcom_reset_ops;
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reset->rcdev.owner = dev->driver->owner;
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reset->rcdev.nr_resets = desc->num_resets;
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reset->regmap = regmap;
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reset->reset_map = desc->resets;
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ret = reset_controller_register(&reset->rcdev);
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if (ret)
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return ret;
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devm_add_action(dev, qcom_cc_reset_unregister, &reset->rcdev);
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if (desc->gdscs && desc->num_gdscs) {
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ret = gdsc_register(dev, desc->gdscs, desc->num_gdscs,
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&reset->rcdev, regmap);
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if (ret)
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return ret;
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}
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devm_add_action(dev, qcom_cc_gdsc_unregister, dev);
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return 0;
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}
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EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
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int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
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{
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struct regmap *regmap;
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regmap = qcom_cc_map(pdev, desc);
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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return qcom_cc_really_probe(pdev, desc, regmap);
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}
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EXPORT_SYMBOL_GPL(qcom_cc_probe);
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MODULE_LICENSE("GPL v2");
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