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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ee12c9efe6
These PM ops will enable/disable the optional PHYs if present. The AXI link-down register in the host driver is now cleared in cdns_pci_map_bus() since the link-down bit will be set if the PHY has been disabled. It is not cleared when enabling the PHY, since the link will not yet be up (e.g. when an EP controller is connected back-to-back to the host controller and its PHY is still disabled). Link: http://lkml.kernel.org/r/1529915453-4633-5-git-send-email-adouglas@cadence.com Signed-off-by: Alan Douglas <adouglas@cadence.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> |
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.. | ||
dwc | ||
Kconfig | ||
Makefile | ||
pci-aardvark.c | ||
pci-ftpci100.c | ||
pci-host-common.c | ||
pci-host-generic.c | ||
pci-hyperv.c | ||
pci-mvebu.c | ||
pci-rcar-gen2.c | ||
pci-tegra.c | ||
pci-thunder-ecam.c | ||
pci-thunder-pem.c | ||
pci-v3-semi.c | ||
pci-versatile.c | ||
pci-xgene-msi.c | ||
pci-xgene.c | ||
pcie-altera-msi.c | ||
pcie-altera.c | ||
pcie-cadence-ep.c | ||
pcie-cadence-host.c | ||
pcie-cadence.c | ||
pcie-cadence.h | ||
pcie-iproc-bcma.c | ||
pcie-iproc-msi.c | ||
pcie-iproc-platform.c | ||
pcie-iproc.c | ||
pcie-iproc.h | ||
pcie-mediatek.c | ||
pcie-mobiveil.c | ||
pcie-rcar.c | ||
pcie-rockchip-ep.c | ||
pcie-rockchip-host.c | ||
pcie-rockchip.c | ||
pcie-rockchip.h | ||
pcie-tango.c | ||
pcie-xilinx-nwl.c | ||
pcie-xilinx.c | ||
vmd.c |