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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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69193e5060
Give ourselves a way to wait for certain fence #.. makes it easier to wait on a set of bo's, which we'll need for atomic. Signed-off-by: Rob Clark <robdclark@gmail.com>
116 lines
3.0 KiB
C
116 lines
3.0 KiB
C
/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MSM_GEM_H__
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#define __MSM_GEM_H__
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#include <linux/reservation.h>
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#include "msm_drv.h"
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struct msm_gem_object {
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struct drm_gem_object base;
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uint32_t flags;
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/* And object is either:
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* inactive - on priv->inactive_list
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* active - on one one of the gpu's active_list.. well, at
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* least for now we don't have (I don't think) hw sync between
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* 2d and 3d one devices which have both, meaning we need to
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* block on submit if a bo is already on other ring
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*
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*/
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struct list_head mm_list;
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struct msm_gpu *gpu; /* non-null if active */
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uint32_t read_fence, write_fence;
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/* Transiently in the process of submit ioctl, objects associated
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* with the submit are on submit->bo_list.. this only lasts for
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* the duration of the ioctl, so one bo can never be on multiple
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* submit lists.
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*/
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struct list_head submit_entry;
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struct page **pages;
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struct sg_table *sgt;
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void *vaddr;
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struct {
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// XXX
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uint32_t iova;
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} domain[NUM_DOMAINS];
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/* normally (resv == &_resv) except for imported bo's */
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struct reservation_object *resv;
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struct reservation_object _resv;
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/* For physically contiguous buffers. Used when we don't have
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* an IOMMU.
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*/
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struct drm_mm_node *vram_node;
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};
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#define to_msm_bo(x) container_of(x, struct msm_gem_object, base)
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static inline bool is_active(struct msm_gem_object *msm_obj)
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{
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return msm_obj->gpu != NULL;
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}
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static inline uint32_t msm_gem_fence(struct msm_gem_object *msm_obj,
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uint32_t op)
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{
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uint32_t fence = 0;
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if (op & MSM_PREP_READ)
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fence = msm_obj->write_fence;
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if (op & MSM_PREP_WRITE)
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fence = max(fence, msm_obj->read_fence);
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return fence;
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}
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#define MAX_CMDS 4
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/* Created per submit-ioctl, to track bo's and cmdstream bufs, etc,
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* associated with the cmdstream submission for synchronization (and
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* make it easier to unwind when things go wrong, etc). This only
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* lasts for the duration of the submit-ioctl.
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*/
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struct msm_gem_submit {
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struct drm_device *dev;
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struct msm_gpu *gpu;
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struct list_head bo_list;
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struct ww_acquire_ctx ticket;
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uint32_t fence;
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bool valid;
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unsigned int nr_cmds;
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unsigned int nr_bos;
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struct {
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uint32_t type;
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uint32_t size; /* in dwords */
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uint32_t iova;
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uint32_t idx; /* cmdstream buffer idx in bos[] */
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} cmd[MAX_CMDS];
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struct {
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uint32_t flags;
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struct msm_gem_object *obj;
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uint32_t iova;
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} bos[0];
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};
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#endif /* __MSM_GEM_H__ */
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