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a4c3733d32
Many of the privileged CSRs exist in a supervisor and machine version that are used very similarly. Provide versions of the CSR names and fields that map to either the S-mode or M-mode variant depending on a new CONFIG_RISCV_M_MODE kconfig symbol. Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com> and Paul Walmsley <paul.walmsley@sifive.com>. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> # for drivers/clocksource, drivers/irqchip [paul.walmsley@sifive.com: updated to apply] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
54 lines
1.0 KiB
C
54 lines
1.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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* Copyright (C) 2018 Christoph Hellwig
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*/
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#include <linux/interrupt.h>
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#include <linux/irqchip.h>
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#include <linux/irqdomain.h>
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#include <linux/seq_file.h>
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#include <asm/smp.h>
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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show_ipi_stats(p, prec);
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return 0;
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}
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asmlinkage __visible void __irq_entry do_IRQ(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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irq_enter();
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switch (regs->cause & ~CAUSE_IRQ_FLAG) {
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case IRQ_TIMER:
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riscv_timer_interrupt();
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break;
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#ifdef CONFIG_SMP
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case IRQ_SOFT:
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/*
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* We only use software interrupts to pass IPIs, so if a non-SMP
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* system gets one, then we don't know what to do.
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*/
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riscv_software_interrupt();
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break;
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#endif
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case IRQ_EXT:
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handle_arch_irq(regs);
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break;
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default:
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pr_alert("unexpected interrupt cause 0x%lx", regs->cause);
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BUG();
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}
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irq_exit();
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set_irq_regs(old_regs);
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}
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void __init init_IRQ(void)
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{
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irqchip_init();
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}
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