mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 22:55:11 +07:00
37ece7e341
We need to ungate RCLK on AST2500- and AST2600-based platforms for RMII to function. RMII interfaces are commonly used for NCSI. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
875 lines
13 KiB
Plaintext
875 lines
13 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/dts-v1/;
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#include "aspeed-g5.dtsi"
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#include <dt-bindings/gpio/aspeed-gpio.h>
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#include <dt-bindings/leds/leds-pca955x.h>
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/ {
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model = "FP5280G2 BMC";
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compatible = "inspur,fp5280g2-bmc", "aspeed,ast2500";
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chosen {
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stdout-path = &uart5;
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bootargs = "console=ttyS4,115200 earlyprintk";
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};
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memory@80000000 {
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reg = <0x80000000 0x20000000>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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vga_memory: framebuffer@9f000000 {
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no-map;
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reg = <0x9f000000 0x01000000>; /* 16M */
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};
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flash_memory: region@98000000 {
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no-map;
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reg = <0x98000000 0x04000000>; /* 64M */
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};
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coldfire_memory: codefire_memory@9ef00000 {
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reg = <0x9ef00000 0x00100000>;
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no-map;
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};
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gfx_memory: framebuffer {
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size = <0x01000000>;
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alignment = <0x01000000>;
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compatible = "shared-dma-pool";
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reusable;
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};
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video_engine_memory: jpegbuffer {
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size = <0x02000000>; /* 32M */
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alignment = <0x01000000>;
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compatible = "shared-dma-pool";
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reusable;
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};
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};
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fsi: gpio-fsi {
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compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";
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#address-cells = <2>;
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#size-cells = <0>;
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no-gpio-delays;
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memory-region = <&coldfire_memory>;
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aspeed,sram = <&sram>;
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aspeed,cvic = <&cvic>;
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clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
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data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>;
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mux-gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_HIGH>;
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enable-gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
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trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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checkstop {
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label = "checkstop";
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gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>;
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linux,code = <ASPEED_GPIO(B, 3)>;
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};
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ps0-presence {
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label = "ps0-presence";
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gpios = <&gpio ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
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linux,code = <ASPEED_GPIO(F, 0)>;
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};
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ps1-presence {
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label = "ps1-presence";
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gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
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linux,code = <ASPEED_GPIO(F, 1)>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <1000>;
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fan0-presence {
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label = "fan0-presence";
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gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
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linux,code = <1>;
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};
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fan1-presence {
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label = "fan1-presence";
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gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
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linux,code = <2>;
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};
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fan2-presence {
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label = "fan2-presence";
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gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
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linux,code = <3>;
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};
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fan3-presence {
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label = "fan3-presence";
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gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
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linux,code = <4>;
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};
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fan4-presence {
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label = "fan4-presence";
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gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
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linux,code = <5>;
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};
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fan5-presence {
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label = "fan5-presence";
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gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
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linux,code = <6>;
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};
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fan6-presence {
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label = "fan6-presence";
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gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
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linux,code = <7>;
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};
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fan7-presence {
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label = "fan7-presence";
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gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
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linux,code = <8>;
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};
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};
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leds {
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compatible = "gpio-leds";
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power {
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label = "power";
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/* TODO: dummy gpio */
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gpios = <&gpio ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>;
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};
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init-ok {
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label = "init-ok";
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gpios = <&gpio ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW>;
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};
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front-memory {
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label = "front-memory";
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gpios = <&gpio ASPEED_GPIO(F, 4) GPIO_ACTIVE_LOW>;
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};
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front-syshot {
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label = "front-syshot";
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gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
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};
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front-syshealth {
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label = "front-syshealth";
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gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
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};
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front-fan {
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label = "front-fan";
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gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
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};
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front-psu {
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label = "front-psu";
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gpios = <&gpio ASPEED_GPIO(B, 2) GPIO_ACTIVE_LOW>;
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};
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identify {
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label = "identify";
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gpios = <&gpio ASPEED_GPIO(Z, 7) GPIO_ACTIVE_LOW>;
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};
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};
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iio-hwmon-battery {
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compatible = "iio-hwmon";
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io-channels = <&adc 15>;
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};
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
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<&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
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<&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>;
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};
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};
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&fmc {
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status = "okay";
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flash@0 {
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status = "okay";
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label = "bmc";
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m25p,fast-read;
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spi-max-frequency = <50000000>;
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#include "openbmc-flash-layout.dtsi"
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};
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};
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&spi1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1_default>;
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flash@0 {
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status = "okay";
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label = "pnor";
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m25p,fast-read;
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spi-max-frequency = <100000000>;
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};
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};
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&uart1 {
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/* Rear RS-232 connector */
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_txd1_default
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&pinctrl_rxd1_default
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&pinctrl_nrts1_default
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&pinctrl_ndtr1_default
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&pinctrl_ndsr1_default
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&pinctrl_ncts1_default
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&pinctrl_ndcd1_default
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&pinctrl_nri1_default>;
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};
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&uart2 {
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/* Test Point */
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
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};
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&uart3 {
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/* APSS */
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
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};
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&uart5 {
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status = "okay";
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};
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&lpc_ctrl {
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status = "okay";
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memory-region = <&flash_memory>;
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flash = <&spi1>;
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};
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&mac0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rmii1_default>;
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clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
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<&syscon ASPEED_CLK_MAC1RCLK>;
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clock-names = "MACCLK", "RCLK";
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use-ncsi;
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};
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&mac1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
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};
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&i2c0 {
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/* LCD */
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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eeprom@50 {
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compatible = "atmel,24c256";
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reg = <0x50>;
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label = "fru";
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};
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};
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&i2c2 {
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status = "okay";
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tmp112@48 {
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compatible = "ti,tmp112";
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reg = <0x48>;
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label = "inlet";
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};
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tmp112@49 {
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compatible = "ti,tmp112";
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reg = <0x49>;
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label = "outlet";
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};
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i2c-switch@70 {
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compatible = "nxp,pca9546";
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reg = <0x70>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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tmp112@4a {
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compatible = "ti,tmp112";
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reg = <0x4a>;
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label = "psu_inlet";
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};
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};
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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tmp112@4a {
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compatible = "ti,tmp112";
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reg = <0x4a>;
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label = "ocp_zone";
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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tmp112@4a {
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compatible = "ti,tmp112";
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reg = <0x4a>;
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label = "bmc_zone";
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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tmp112@7c {
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compatible = "microchip,emc1413";
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reg = <0x7c>;
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};
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};
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};
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};
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&i2c3 {
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/* Riser Card */
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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rtc@68 {
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compatible = "dallas,ds3232";
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reg = <0x68>;
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};
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};
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&i2c5 {
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/* vr */
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status = "okay";
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};
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&i2c6 {
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/* bp card */
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status = "okay";
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};
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&i2c7 {
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status = "okay";
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i2c-switch@70 {
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compatible = "nxp,pca9546";
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reg = <0x70>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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adm1278@10 {
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compatible = "adi,adm1278";
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reg = <0x10>;
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};
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adm1278@13 {
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compatible = "adi,adm1278";
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reg = <0x13>;
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};
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adm1278@50 {
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compatible = "adi,adm1278";
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reg = <0x50>;
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};
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adm1278@53 {
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compatible = "adi,adm1278";
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reg = <0x53>;
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};
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};
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/*pcie riser*/
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};
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};
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&i2c8 {
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status = "okay";
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pca0: pca9555@20 {
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compatible = "nxp,pca9555";
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reg = <0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio@0 {
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reg = <0>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@1 {
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reg = <1>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@2 {
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reg = <2>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@3 {
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reg = <3>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@4 {
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reg = <4>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@5 {
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reg = <5>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@6 {
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reg = <6>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@7 {
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reg = <7>;
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type = <PCA955X_TYPE_GPIO>;
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};
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};
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pca1: pca9555@21 {
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compatible = "nxp,pca9555";
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reg = <0x21>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio@0 {
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reg = <0>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@1 {
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reg = <1>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@2 {
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reg = <2>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@3 {
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reg = <3>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@4 {
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reg = <4>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@5 {
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reg = <5>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@6 {
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reg = <6>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@7 {
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reg = <7>;
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type = <PCA955X_TYPE_GPIO>;
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};
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};
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pca2: pca9555@22 {
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compatible = "nxp,pca9555";
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reg = <0x22>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio@0 {
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reg = <0>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@1 {
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reg = <1>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@2 {
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reg = <2>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@3 {
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reg = <3>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@4 {
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reg = <4>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@5 {
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reg = <5>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@6 {
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reg = <6>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@7 {
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reg = <7>;
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type = <PCA955X_TYPE_GPIO>;
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};
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};
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pca3: pca9555@23 {
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compatible = "nxp,pca9555";
|
|
reg = <0x23>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
gpio@0 {
|
|
reg = <0>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@1 {
|
|
reg = <1>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@2 {
|
|
reg = <2>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@3 {
|
|
reg = <3>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@4 {
|
|
reg = <4>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@5 {
|
|
reg = <5>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@6 {
|
|
reg = <6>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@7 {
|
|
reg = <7>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
};
|
|
|
|
pca4: pca9555@24 {
|
|
compatible = "nxp,pca9555";
|
|
reg = <0x24>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
gpio@0 {
|
|
reg = <0>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@1 {
|
|
reg = <1>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@2 {
|
|
reg = <2>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@3 {
|
|
reg = <3>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@4 {
|
|
reg = <4>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@5 {
|
|
reg = <5>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@6 {
|
|
reg = <6>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@7 {
|
|
reg = <7>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
};
|
|
|
|
pca5: pca9555@25 {
|
|
compatible = "nxp,pca9555";
|
|
reg = <0x25>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
gpio@0 {
|
|
reg = <0>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@1 {
|
|
reg = <1>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@2 {
|
|
reg = <2>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@3 {
|
|
reg = <3>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@4 {
|
|
reg = <4>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@5 {
|
|
reg = <5>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@6 {
|
|
reg = <6>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
|
|
gpio@7 {
|
|
reg = <7>;
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
&i2c9 {
|
|
/* cpld */
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c10 {
|
|
/* hdd bp */
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c11 {
|
|
status = "okay";
|
|
|
|
power-supply@58 {
|
|
compatible = "pmbus";
|
|
reg = <0x58>;
|
|
};
|
|
|
|
power-supply@59 {
|
|
compatible = "pmbus";
|
|
reg = <0x59>;
|
|
};
|
|
};
|
|
|
|
&i2c12 {
|
|
/* odcc */
|
|
status = "okay";
|
|
};
|
|
|
|
&vuart {
|
|
status = "okay";
|
|
};
|
|
|
|
&gfx {
|
|
status = "okay";
|
|
memory-region = <&gfx_memory>;
|
|
};
|
|
|
|
&pinctrl {
|
|
aspeed,external-nodes = <&gfx &lhc>;
|
|
};
|
|
|
|
&wdt1 {
|
|
aspeed,reset-type = "none";
|
|
aspeed,external-signal;
|
|
aspeed,ext-push-pull;
|
|
aspeed,ext-active-high;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_wdtrst1_default>;
|
|
};
|
|
|
|
&ibt {
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
&adc {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
|
|
&pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default
|
|
&pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default
|
|
&pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default
|
|
&pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default
|
|
&pinctrl_adc14_default &pinctrl_adc15_default>;
|
|
};
|
|
|
|
&vhub {
|
|
status = "okay";
|
|
};
|
|
|
|
&video {
|
|
status = "okay";
|
|
memory-region = <&video_engine_memory>;
|
|
};
|
|
|
|
&pwm_tacho {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
|
|
&pinctrl_pwm2_default &pinctrl_pwm3_default
|
|
&pinctrl_pwm4_default &pinctrl_pwm5_default
|
|
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
|
|
|
|
fan@0 {
|
|
reg = <0x00>;
|
|
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
|
|
};
|
|
|
|
fan@1 {
|
|
reg = <0x01>;
|
|
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
|
|
};
|
|
|
|
fan@2 {
|
|
reg = <0x02>;
|
|
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
|
|
};
|
|
|
|
fan@3 {
|
|
reg = <0x03>;
|
|
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
|
|
};
|
|
|
|
fan@4 {
|
|
reg = <0x04>;
|
|
aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
|
|
};
|
|
|
|
fan@5 {
|
|
reg = <0x05>;
|
|
aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
|
|
};
|
|
|
|
fan@6 {
|
|
reg = <0x06>;
|
|
aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>;
|
|
};
|
|
|
|
fan@7 {
|
|
reg = <0x07>;
|
|
aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>;
|
|
};
|
|
|
|
};
|
|
|
|
#include "ibm-power9-dual.dtsi"
|