mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-02-07 19:25:11 +07:00
ed5316d445
Ensure that no SMI interrupts occur between the read of the HPET & TSC in the clock calibration loop. I noticed that a 2.66GHz system incorrectly detected the processor clock speed about 1/7 of the time: time.c: Detected 2660.005 MHz processor. (most of the time) time.c: Detected 2988.203 MHz processor. (sometime) The problem is caused by an SMI interrupt occuring in hpet_calibrate_tsc() between the read of the HPET & TSC. Prior to switching the BIOS into ACPI mode, it appears that every 27msec an SMI interrupt occurs. The SMI interrupt takes 4.8 msec to process. Note: On my test system, TICK_MIN had to be >380. I picked 5000 to minimize risk of having a value that is too small for other platforms. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Andi Kleen <ak@suse.de> arch/x86_64/kernel/time.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) |
||
---|---|---|
.. | ||
acpi | ||
cpufreq | ||
aperture.c | ||
apic.c | ||
asm-offsets.c | ||
audit.c | ||
crash_dump.c | ||
crash.c | ||
e820.c | ||
early_printk.c | ||
early-quirks.c | ||
entry.S | ||
functionlist | ||
genapic_cluster.c | ||
genapic_flat.c | ||
genapic.c | ||
head64.c | ||
head.S | ||
i387.c | ||
i8259.c | ||
init_task.c | ||
io_apic.c | ||
ioport.c | ||
irq.c | ||
k8.c | ||
kprobes.c | ||
ldt.c | ||
machine_kexec.c | ||
Makefile | ||
mce_amd.c | ||
mce_intel.c | ||
mce.c | ||
module.c | ||
mpparse.c | ||
nmi.c | ||
pci-calgary.c | ||
pci-dma.c | ||
pci-gart.c | ||
pci-nommu.c | ||
pci-swiotlb.c | ||
pmtimer.c | ||
process.c | ||
ptrace.c | ||
reboot.c | ||
relocate_kernel.S | ||
setup64.c | ||
setup.c | ||
signal.c | ||
smp.c | ||
smpboot.c | ||
stacktrace.c | ||
suspend_asm.S | ||
suspend.c | ||
sys_x86_64.c | ||
syscall.c | ||
tce.c | ||
time.c | ||
trampoline.S | ||
traps.c | ||
vmlinux.lds.S | ||
vsmp.c | ||
vsyscall.c | ||
x8664_ksyms.c |