* MSI support for Intel Merrifield
* Refactor gpio-pch to be up-to-date with recent kernel APIs
* Miscellaneous cleanups here and there
The following is an automated git shortlog grouped by driver:
ich:
- fix a typo
merrifield:
- Better show how GPIO and IRQ bases are derived from hardware
- Switch over to MSI interrupts
pch:
- Use in pch_irq_type() macros provided by IRQ core
- Refactor pch_irq_type() to avoid unnecessary locking
- Get rid of unneeded variable in IRQ handler
- Use BIT() and GENMASK() where it's appropriate
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAl65YWMACgkQb7wzTHR8
rCgOfRAApn+H8DzunFCHdskAwE8RZlPqwYA0McawGnnOExKEohkXO/8ckaQ1OA+e
7TeR5H2wJQzRChj4d9bAirmwOT0PGL8IrWsfZOPV4TUpF0LpRfmZr+Y0lzV83eB0
C/qfPRTjKLIcBSLpyayW9dEBKS0G6NlPgM9GSfR/Vkzw+Lv5LwHSHjGjgRM+vFk6
XMc+0dmxicOAhx9i1nVjoQVXJJ/zOMmZZ4/+7ShglXevkRHlZzBoxizLxM3swTka
9dQ4CoTWNvmNfTYAsBWFuXNrL5aiNKM/eynQio8rlDMOM/KoiP3KtKr7NZBcKnai
RUUa19l96IxNaE/u1HY9FuaBP0VwQ3CuCWSI5aYjj4dfpUk0dMcNJNjoZ4u9F9xZ
Rn7tFLvmyhXBvrFKcZglKfD7u/SE2YzPLR4IMBjbBdYBSrsktOpJBZbvRm2ZzxJv
UE4CY2A2e6BC9YUD0IwokiP76h/YGMYbRf+3mYt0zJAaQFnWBBixRBDAQHqMjV99
jC6iIJJKHbL9Ai9QnlZ1P6edHJG0FsuvAN4D6ufZhjI9Df5n2ou7pfwTZrWOY/zh
+RNEHrC3jCoux1FRtcYjL9N4ax9WiIVClc/wkp52pRauRtptNFg9sjuz9KM7dPNl
jyyqA3FLDR3wG5wcpbSP1/xzhbHrSTDUbIN6Pr8R/QZnNIEZt2U=
=P708
-----END PGP SIGNATURE-----
Merge tag 'intel-gpio-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel
intel-gpio for v5.8-1
* MSI support for Intel Merrifield
* Refactor gpio-pch to be up-to-date with recent kernel APIs
* Miscellaneous cleanups here and there
The following is an automated git shortlog grouped by driver:
ich:
- fix a typo
merrifield:
- Better show how GPIO and IRQ bases are derived from hardware
- Switch over to MSI interrupts
pch:
- Use in pch_irq_type() macros provided by IRQ core
- Refactor pch_irq_type() to avoid unnecessary locking
- Get rid of unneeded variable in IRQ handler
- Use BIT() and GENMASK() where it's appropriate
ed43f2b4e7