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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ed1a2459e2
A proper External Memory Controller clock rounding and parent selection functionality is required by the EMC drivers, it is not available using the generic clock implementation because only the Memory Controller driver is aware of what clock rates are actually available for a particular device. EMC drivers will have to register a Tegra-specific CLK-API callback which will perform rounding of a requested rate. EMC clock users won't be able to request EMC clock by getting -EPROBE_DEFER until EMC driver is probed and the callback is set up. The functionality is somewhat similar to the clk-emc.c which serves Tegra124+ SoCs. The later HW generations support more parent clock sources and the HW configuration / integration with the EMC drivers differs a tad from the older gens, hence it's not really worth to try to squash everything into a single source file. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
134 lines
3.0 KiB
C
134 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
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*/
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#ifndef __LINUX_CLK_TEGRA_H_
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#define __LINUX_CLK_TEGRA_H_
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#include <linux/types.h>
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#include <linux/bug.h>
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/*
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* Tegra CPU clock and reset control ops
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*
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* wait_for_reset:
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* keep waiting until the CPU in reset state
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* put_in_reset:
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* put the CPU in reset state
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* out_of_reset:
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* release the CPU from reset state
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* enable_clock:
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* CPU clock un-gate
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* disable_clock:
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* CPU clock gate
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* rail_off_ready:
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* CPU is ready for rail off
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* suspend:
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* save the clock settings when CPU go into low-power state
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* resume:
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* restore the clock settings when CPU exit low-power state
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*/
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struct tegra_cpu_car_ops {
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void (*wait_for_reset)(u32 cpu);
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void (*put_in_reset)(u32 cpu);
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void (*out_of_reset)(u32 cpu);
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void (*enable_clock)(u32 cpu);
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void (*disable_clock)(u32 cpu);
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#ifdef CONFIG_PM_SLEEP
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bool (*rail_off_ready)(void);
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void (*suspend)(void);
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void (*resume)(void);
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#endif
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};
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extern struct tegra_cpu_car_ops *tegra_cpu_car_ops;
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static inline void tegra_wait_cpu_in_reset(u32 cpu)
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{
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if (WARN_ON(!tegra_cpu_car_ops->wait_for_reset))
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return;
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tegra_cpu_car_ops->wait_for_reset(cpu);
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}
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static inline void tegra_put_cpu_in_reset(u32 cpu)
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{
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if (WARN_ON(!tegra_cpu_car_ops->put_in_reset))
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return;
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tegra_cpu_car_ops->put_in_reset(cpu);
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}
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static inline void tegra_cpu_out_of_reset(u32 cpu)
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{
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if (WARN_ON(!tegra_cpu_car_ops->out_of_reset))
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return;
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tegra_cpu_car_ops->out_of_reset(cpu);
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}
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static inline void tegra_enable_cpu_clock(u32 cpu)
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{
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if (WARN_ON(!tegra_cpu_car_ops->enable_clock))
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return;
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tegra_cpu_car_ops->enable_clock(cpu);
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}
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static inline void tegra_disable_cpu_clock(u32 cpu)
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{
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if (WARN_ON(!tegra_cpu_car_ops->disable_clock))
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return;
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tegra_cpu_car_ops->disable_clock(cpu);
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}
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#ifdef CONFIG_PM_SLEEP
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static inline bool tegra_cpu_rail_off_ready(void)
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{
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if (WARN_ON(!tegra_cpu_car_ops->rail_off_ready))
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return false;
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return tegra_cpu_car_ops->rail_off_ready();
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}
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static inline void tegra_cpu_clock_suspend(void)
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{
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if (WARN_ON(!tegra_cpu_car_ops->suspend))
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return;
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tegra_cpu_car_ops->suspend();
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}
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static inline void tegra_cpu_clock_resume(void)
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{
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if (WARN_ON(!tegra_cpu_car_ops->resume))
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return;
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tegra_cpu_car_ops->resume();
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}
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#endif
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extern void tegra210_xusb_pll_hw_control_enable(void);
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extern void tegra210_xusb_pll_hw_sequence_start(void);
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extern void tegra210_sata_pll_hw_control_enable(void);
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extern void tegra210_sata_pll_hw_sequence_start(void);
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extern void tegra210_set_sata_pll_seq_sw(bool state);
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extern void tegra210_put_utmipll_in_iddq(void);
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extern void tegra210_put_utmipll_out_iddq(void);
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extern int tegra210_clk_handle_mbist_war(unsigned int id);
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struct clk;
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typedef long (tegra20_clk_emc_round_cb)(unsigned long rate,
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unsigned long min_rate,
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unsigned long max_rate,
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void *arg);
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void tegra20_clk_set_emc_round_callback(tegra20_clk_emc_round_cb *round_cb,
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void *cb_arg);
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int tegra20_clk_prepare_emc_mc_same_freq(struct clk *emc_clk, bool same);
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#endif /* __LINUX_CLK_TEGRA_H_ */
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