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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b276f1b3b1
The trailing semicolon is an empty statement that does no operation. Removing it since it doesn't do anything. Signed-off-by: Luis de Bethencourt <luisbg@kernel.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
324 lines
7.5 KiB
C
324 lines
7.5 KiB
C
/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef __ARM_KVM_EMULATE_H__
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#define __ARM_KVM_EMULATE_H__
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#include <linux/kvm_host.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_mmio.h>
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#include <asm/kvm_arm.h>
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#include <asm/cputype.h>
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/* arm64 compatibility macros */
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#define COMPAT_PSR_MODE_ABT ABT_MODE
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#define COMPAT_PSR_MODE_UND UND_MODE
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#define COMPAT_PSR_T_BIT PSR_T_BIT
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#define COMPAT_PSR_I_BIT PSR_I_BIT
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#define COMPAT_PSR_A_BIT PSR_A_BIT
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#define COMPAT_PSR_E_BIT PSR_E_BIT
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#define COMPAT_PSR_IT_MASK PSR_IT_MASK
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unsigned long *vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num);
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static inline unsigned long *vcpu_reg32(struct kvm_vcpu *vcpu, u8 reg_num)
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{
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return vcpu_reg(vcpu, reg_num);
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}
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unsigned long *vcpu_spsr(struct kvm_vcpu *vcpu);
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static inline unsigned long vcpu_get_reg(struct kvm_vcpu *vcpu,
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u8 reg_num)
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{
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return *vcpu_reg(vcpu, reg_num);
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}
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static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
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unsigned long val)
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{
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*vcpu_reg(vcpu, reg_num) = val;
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}
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bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
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void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr);
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void kvm_inject_undef32(struct kvm_vcpu *vcpu);
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void kvm_inject_dabt32(struct kvm_vcpu *vcpu, unsigned long addr);
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void kvm_inject_pabt32(struct kvm_vcpu *vcpu, unsigned long addr);
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void kvm_inject_vabt(struct kvm_vcpu *vcpu);
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static inline void kvm_inject_undefined(struct kvm_vcpu *vcpu)
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{
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kvm_inject_undef32(vcpu);
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}
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static inline void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr)
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{
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kvm_inject_dabt32(vcpu, addr);
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}
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static inline void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr)
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{
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kvm_inject_pabt32(vcpu, addr);
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}
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static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu)
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{
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return kvm_condition_valid32(vcpu);
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}
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static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr)
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{
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kvm_skip_instr32(vcpu, is_wide_instr);
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}
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static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hcr = HCR_GUEST_MASK;
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}
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static inline unsigned long vcpu_get_hcr(const struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.hcr;
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}
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static inline void vcpu_set_hcr(struct kvm_vcpu *vcpu, unsigned long hcr)
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{
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vcpu->arch.hcr = hcr;
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}
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static inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu)
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{
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return 1;
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}
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static inline unsigned long *vcpu_pc(struct kvm_vcpu *vcpu)
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{
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return &vcpu->arch.ctxt.gp_regs.usr_regs.ARM_pc;
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}
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static inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu)
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{
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return (unsigned long *)&vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr;
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}
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static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
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{
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*vcpu_cpsr(vcpu) |= PSR_T_BIT;
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}
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static inline bool mode_has_spsr(struct kvm_vcpu *vcpu)
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{
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unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK;
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return (cpsr_mode > USR_MODE && cpsr_mode < SYSTEM_MODE);
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}
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static inline bool vcpu_mode_priv(struct kvm_vcpu *vcpu)
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{
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unsigned long cpsr_mode = vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr & MODE_MASK;
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return cpsr_mode > USR_MODE;
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}
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static inline u32 kvm_vcpu_get_hsr(const struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault.hsr;
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}
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static inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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if (hsr & HSR_CV)
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return (hsr & HSR_COND) >> HSR_COND_SHIFT;
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return -1;
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}
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static inline unsigned long kvm_vcpu_get_hfar(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault.hxfar;
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}
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static inline phys_addr_t kvm_vcpu_get_fault_ipa(struct kvm_vcpu *vcpu)
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{
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return ((phys_addr_t)vcpu->arch.fault.hpfar & HPFAR_MASK) << 8;
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}
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static inline bool kvm_vcpu_dabt_isvalid(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) & HSR_ISV;
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}
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static inline bool kvm_vcpu_dabt_iswrite(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) & HSR_WNR;
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}
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static inline bool kvm_vcpu_dabt_issext(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) & HSR_SSE;
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}
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static inline int kvm_vcpu_dabt_get_rd(struct kvm_vcpu *vcpu)
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{
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return (kvm_vcpu_get_hsr(vcpu) & HSR_SRT_MASK) >> HSR_SRT_SHIFT;
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}
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static inline bool kvm_vcpu_dabt_iss1tw(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) & HSR_DABT_S1PTW;
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}
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static inline bool kvm_vcpu_dabt_is_cm(struct kvm_vcpu *vcpu)
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{
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return !!(kvm_vcpu_get_hsr(vcpu) & HSR_DABT_CM);
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}
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/* Get Access Size from a data abort */
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static inline int kvm_vcpu_dabt_get_as(struct kvm_vcpu *vcpu)
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{
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switch ((kvm_vcpu_get_hsr(vcpu) >> 22) & 0x3) {
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case 0:
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return 1;
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case 1:
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return 2;
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case 2:
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return 4;
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default:
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kvm_err("Hardware is weird: SAS 0b11 is reserved\n");
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return -EFAULT;
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}
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}
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/* This one is not specific to Data Abort */
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static inline bool kvm_vcpu_trap_il_is32bit(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) & HSR_IL;
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}
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static inline u8 kvm_vcpu_trap_get_class(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) >> HSR_EC_SHIFT;
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}
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static inline bool kvm_vcpu_trap_is_iabt(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_trap_get_class(vcpu) == HSR_EC_IABT;
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}
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static inline u8 kvm_vcpu_trap_get_fault(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) & HSR_FSC;
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}
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static inline u8 kvm_vcpu_trap_get_fault_type(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) & HSR_FSC_TYPE;
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}
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static inline bool kvm_vcpu_dabt_isextabt(struct kvm_vcpu *vcpu)
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{
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switch (kvm_vcpu_trap_get_fault(vcpu)) {
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case FSC_SEA:
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case FSC_SEA_TTW0:
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case FSC_SEA_TTW1:
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case FSC_SEA_TTW2:
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case FSC_SEA_TTW3:
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case FSC_SECC:
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case FSC_SECC_TTW0:
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case FSC_SECC_TTW1:
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case FSC_SECC_TTW2:
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case FSC_SECC_TTW3:
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return true;
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default:
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return false;
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}
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}
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static inline u32 kvm_vcpu_hvc_get_imm(struct kvm_vcpu *vcpu)
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{
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return kvm_vcpu_get_hsr(vcpu) & HSR_HVC_IMM_MASK;
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}
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static inline unsigned long kvm_vcpu_get_mpidr_aff(struct kvm_vcpu *vcpu)
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{
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return vcpu_cp15(vcpu, c0_MPIDR) & MPIDR_HWID_BITMASK;
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}
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static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu)
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{
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*vcpu_cpsr(vcpu) |= PSR_E_BIT;
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}
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static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu)
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{
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return !!(*vcpu_cpsr(vcpu) & PSR_E_BIT);
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}
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static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu,
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unsigned long data,
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unsigned int len)
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{
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if (kvm_vcpu_is_be(vcpu)) {
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switch (len) {
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case 1:
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return data & 0xff;
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case 2:
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return be16_to_cpu(data & 0xffff);
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default:
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return be32_to_cpu(data);
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}
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} else {
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switch (len) {
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case 1:
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return data & 0xff;
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case 2:
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return le16_to_cpu(data & 0xffff);
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default:
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return le32_to_cpu(data);
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}
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}
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}
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static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu,
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unsigned long data,
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unsigned int len)
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{
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if (kvm_vcpu_is_be(vcpu)) {
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switch (len) {
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case 1:
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return data & 0xff;
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case 2:
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return cpu_to_be16(data & 0xffff);
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default:
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return cpu_to_be32(data);
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}
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} else {
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switch (len) {
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case 1:
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return data & 0xff;
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case 2:
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return cpu_to_le16(data & 0xffff);
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default:
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return cpu_to_le32(data);
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}
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}
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}
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#endif /* __ARM_KVM_EMULATE_H__ */
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