mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7328c8f48d
b24413180f ("License cleanup: add SPDX GPL-2.0 license identifier to
files with no license") added SPDX GPL-2.0 to several PCI files that
previously contained no license information.
Add SPDX GPL-2.0 to all other PCI files that did not contain any license
information and hence were under the default GPL version 2 license of the
kernel.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
138 lines
4.2 KiB
C
138 lines
4.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Implement the default iomap interfaces
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*
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* (C) Copyright 2004 Linus Torvalds
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*/
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <linux/export.h>
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#ifdef CONFIG_PCI
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/**
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* pci_iomap_range - create a virtual mapping cookie for a PCI BAR
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* @dev: PCI device that owns the BAR
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* @bar: BAR number
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* @offset: map memory at the given offset in BAR
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* @maxlen: max length of the memory to map
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*
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* Using this function you will get a __iomem address to your device BAR.
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* You can access it using ioread*() and iowrite*(). These functions hide
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* the details if this is a MMIO or PIO address space and will just do what
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* you expect from them in the correct way.
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*
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* @maxlen specifies the maximum length to map. If you want to get access to
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* the complete BAR from offset to the end, pass %0 here.
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* */
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void __iomem *pci_iomap_range(struct pci_dev *dev,
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int bar,
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unsigned long offset,
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unsigned long maxlen)
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{
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resource_size_t start = pci_resource_start(dev, bar);
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resource_size_t len = pci_resource_len(dev, bar);
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unsigned long flags = pci_resource_flags(dev, bar);
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if (len <= offset || !start)
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return NULL;
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len -= offset;
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start += offset;
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if (maxlen && len > maxlen)
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len = maxlen;
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if (flags & IORESOURCE_IO)
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return __pci_ioport_map(dev, start, len);
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if (flags & IORESOURCE_MEM)
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return ioremap(start, len);
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/* What? */
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return NULL;
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}
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EXPORT_SYMBOL(pci_iomap_range);
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/**
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* pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR
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* @dev: PCI device that owns the BAR
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* @bar: BAR number
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* @offset: map memory at the given offset in BAR
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* @maxlen: max length of the memory to map
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*
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* Using this function you will get a __iomem address to your device BAR.
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* You can access it using ioread*() and iowrite*(). These functions hide
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* the details if this is a MMIO or PIO address space and will just do what
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* you expect from them in the correct way. When possible write combining
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* is used.
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*
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* @maxlen specifies the maximum length to map. If you want to get access to
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* the complete BAR from offset to the end, pass %0 here.
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* */
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void __iomem *pci_iomap_wc_range(struct pci_dev *dev,
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int bar,
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unsigned long offset,
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unsigned long maxlen)
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{
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resource_size_t start = pci_resource_start(dev, bar);
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resource_size_t len = pci_resource_len(dev, bar);
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unsigned long flags = pci_resource_flags(dev, bar);
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if (flags & IORESOURCE_IO)
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return NULL;
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if (len <= offset || !start)
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return NULL;
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len -= offset;
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start += offset;
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if (maxlen && len > maxlen)
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len = maxlen;
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if (flags & IORESOURCE_MEM)
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return ioremap_wc(start, len);
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/* What? */
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return NULL;
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}
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EXPORT_SYMBOL_GPL(pci_iomap_wc_range);
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/**
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* pci_iomap - create a virtual mapping cookie for a PCI BAR
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* @dev: PCI device that owns the BAR
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* @bar: BAR number
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* @maxlen: length of the memory to map
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*
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* Using this function you will get a __iomem address to your device BAR.
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* You can access it using ioread*() and iowrite*(). These functions hide
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* the details if this is a MMIO or PIO address space and will just do what
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* you expect from them in the correct way.
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*
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* @maxlen specifies the maximum length to map. If you want to get access to
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* the complete BAR without checking for its length first, pass %0 here.
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* */
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void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
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{
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return pci_iomap_range(dev, bar, 0, maxlen);
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}
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EXPORT_SYMBOL(pci_iomap);
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/**
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* pci_iomap_wc - create a virtual WC mapping cookie for a PCI BAR
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* @dev: PCI device that owns the BAR
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* @bar: BAR number
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* @maxlen: length of the memory to map
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*
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* Using this function you will get a __iomem address to your device BAR.
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* You can access it using ioread*() and iowrite*(). These functions hide
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* the details if this is a MMIO or PIO address space and will just do what
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* you expect from them in the correct way. When possible write combining
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* is used.
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*
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* @maxlen specifies the maximum length to map. If you want to get access to
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* the complete BAR without checking for its length first, pass %0 here.
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* */
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void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
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{
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return pci_iomap_wc_range(dev, bar, 0, maxlen);
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}
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EXPORT_SYMBOL_GPL(pci_iomap_wc);
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#endif /* CONFIG_PCI */
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