mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5d1190ea69
This commit migrates the mach-orion5x platforms to use the mvebu-mbus driver and therefore removes the Orion5x-specific addr-map code. The dove_init_early() function now initializes the mvebu-mbus driver by calling mvebu_mbus_init(). We also convert a number of orion5x_setup_xyz_win() calls to the appropriate mvebu_mbus_add_window() calls, as each board was doing its own setup for the NOR window or other devices. Ultimately, those devices will be probed from the DT. The common address decoding windows are now registered in the orion5x_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Dove has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
177 lines
4.9 KiB
C
177 lines
4.9 KiB
C
/*
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* arch/arm/mach-orion5x/edmini_v2-setup.c
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*
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* LaCie Ethernet Disk mini V2 Setup
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*
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* Copyright (C) 2008 Christopher Moore <moore@free.fr>
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* Copyright (C) 2008 Albert Aribaud <albert.aribaud@free.fr>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/*
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* TODO: add Orion USB device port init when kernel.org support is added.
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* TODO: add flash write support: see below.
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* TODO: add power-off support.
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* TODO: add I2C EEPROM support.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/leds.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/i2c.h>
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#include <linux/ata_platform.h>
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#include <linux/gpio.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/pci.h>
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#include <mach/orion5x.h>
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#include "common.h"
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#include "mpp.h"
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/*****************************************************************************
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* EDMINI_V2 Info
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****************************************************************************/
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/*
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* 512KB NOR flash Device bus boot chip select
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*/
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#define EDMINI_V2_NOR_BOOT_BASE 0xfff80000
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#define EDMINI_V2_NOR_BOOT_SIZE SZ_512K
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/*****************************************************************************
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* 512KB NOR Flash on BOOT Device
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****************************************************************************/
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/*
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* Currently the MTD code does not recognize the MX29LV400CBCT as a bottom
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* -type device. This could cause risks of accidentally erasing critical
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* flash sectors. We thus define a single, write-protected partition covering
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* the whole flash.
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* TODO: once the flash part TOP/BOTTOM detection issue is sorted out in the MTD
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* code, break this into at least three partitions: 'u-boot code', 'u-boot
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* environment' and 'whatever is left'.
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*/
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static struct mtd_partition edmini_v2_partitions[] = {
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{
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.name = "Full512kb",
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.size = 0x00080000,
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.offset = 0x00000000,
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.mask_flags = MTD_WRITEABLE,
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},
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};
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static struct physmap_flash_data edmini_v2_nor_flash_data = {
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.width = 1,
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.parts = edmini_v2_partitions,
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.nr_parts = ARRAY_SIZE(edmini_v2_partitions),
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};
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static struct resource edmini_v2_nor_flash_resource = {
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.flags = IORESOURCE_MEM,
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.start = EDMINI_V2_NOR_BOOT_BASE,
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.end = EDMINI_V2_NOR_BOOT_BASE
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+ EDMINI_V2_NOR_BOOT_SIZE - 1,
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};
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static struct platform_device edmini_v2_nor_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &edmini_v2_nor_flash_data,
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},
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.num_resources = 1,
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.resource = &edmini_v2_nor_flash_resource,
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};
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/*****************************************************************************
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* Ethernet
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****************************************************************************/
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static struct mv643xx_eth_platform_data edmini_v2_eth_data = {
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.phy_addr = 8,
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};
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/*****************************************************************************
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* RTC 5C372a on I2C bus
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****************************************************************************/
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#define EDMINIV2_RTC_GPIO 3
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static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
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I2C_BOARD_INFO("rs5c372a", 0x32),
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.irq = 0,
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};
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/*****************************************************************************
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* General Setup
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****************************************************************************/
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static unsigned int edminiv2_mpp_modes[] __initdata = {
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MPP0_UNUSED,
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MPP1_UNUSED,
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MPP2_UNUSED,
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MPP3_GPIO, /* RTC interrupt */
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MPP4_UNUSED,
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MPP5_UNUSED,
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MPP6_UNUSED,
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MPP7_UNUSED,
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MPP8_UNUSED,
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MPP9_UNUSED,
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MPP10_UNUSED,
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MPP11_UNUSED,
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MPP12_SATA_LED, /* SATA 0 presence */
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MPP13_SATA_LED, /* SATA 1 presence */
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MPP14_SATA_LED, /* SATA 0 active */
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MPP15_SATA_LED, /* SATA 1 active */
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/* 16: Power LED control (0 = On, 1 = Off) */
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MPP16_GPIO,
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/* 17: Power LED control select (0 = CPLD, 1 = GPIO16) */
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MPP17_GPIO,
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/* 18: Power button status (0 = Released, 1 = Pressed) */
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MPP18_GPIO,
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MPP19_UNUSED,
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0,
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};
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void __init edmini_v2_init(void)
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{
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orion5x_mpp_conf(edminiv2_mpp_modes);
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/*
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* Configure peripherals.
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*/
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orion5x_ehci0_init();
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orion5x_eth_init(&edmini_v2_eth_data);
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mvebu_mbus_add_window("devbus-boot", EDMINI_V2_NOR_BOOT_BASE,
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EDMINI_V2_NOR_BOOT_SIZE);
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platform_device_register(&edmini_v2_nor_flash);
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pr_notice("edmini_v2: USB device port, flash write and power-off "
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"are not yet supported.\n");
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/* Get RTC IRQ and register the chip */
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if (gpio_request(EDMINIV2_RTC_GPIO, "rtc") == 0) {
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if (gpio_direction_input(EDMINIV2_RTC_GPIO) == 0)
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edmini_v2_i2c_rtc.irq = gpio_to_irq(EDMINIV2_RTC_GPIO);
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else
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gpio_free(EDMINIV2_RTC_GPIO);
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}
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if (edmini_v2_i2c_rtc.irq == 0)
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pr_warning("edmini_v2: failed to get RTC IRQ\n");
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i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1);
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}
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