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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ecdd6ee77b
Half of our memtype APIs are memtype_ prefixed, the other half are _memtype suffixed: reserve_memtype() free_memtype() kernel_map_sync_memtype() io_reserve_memtype() io_free_memtype() memtype_check_insert() memtype_erase() memtype_lookup() memtype_copy_nth_element() Use prefixes consistently, like most other modern kernel APIs: reserve_memtype() => memtype_reserve() free_memtype() => memtype_free() kernel_map_sync_memtype() => memtype_kernel_map_sync() io_reserve_memtype() => memtype_reserve_io() io_free_memtype() => memtype_free_io() memtype_check_insert() => memtype_check_insert() memtype_erase() => memtype_erase() memtype_lookup() => memtype_lookup() memtype_copy_nth_element() => memtype_copy_nth_element() Signed-off-by: Ingo Molnar <mingo@kernel.org>
117 lines
3.0 KiB
C
117 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright © 2008 Ingo Molnar
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*/
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#include <asm/iomap.h>
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#include <asm/pat.h>
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#include <linux/export.h>
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#include <linux/highmem.h>
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static int is_io_mapping_possible(resource_size_t base, unsigned long size)
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{
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#if !defined(CONFIG_X86_PAE) && defined(CONFIG_PHYS_ADDR_T_64BIT)
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/* There is no way to map greater than 1 << 32 address without PAE */
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if (base + size > 0x100000000ULL)
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return 0;
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#endif
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return 1;
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}
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int iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot)
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{
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enum page_cache_mode pcm = _PAGE_CACHE_MODE_WC;
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int ret;
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if (!is_io_mapping_possible(base, size))
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return -EINVAL;
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ret = memtype_reserve_io(base, base + size, &pcm);
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if (ret)
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return ret;
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*prot = __pgprot(__PAGE_KERNEL | cachemode2protval(pcm));
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/* Filter out unsupported __PAGE_KERNEL* bits: */
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pgprot_val(*prot) &= __default_kernel_pte_mask;
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return 0;
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}
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EXPORT_SYMBOL_GPL(iomap_create_wc);
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void iomap_free(resource_size_t base, unsigned long size)
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{
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memtype_free_io(base, base + size);
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}
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EXPORT_SYMBOL_GPL(iomap_free);
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void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot)
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{
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unsigned long vaddr;
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int idx, type;
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preempt_disable();
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pagefault_disable();
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type = kmap_atomic_idx_push();
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idx = type + KM_TYPE_NR * smp_processor_id();
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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set_pte(kmap_pte - idx, pfn_pte(pfn, prot));
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arch_flush_lazy_mmu_mode();
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return (void *)vaddr;
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}
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/*
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* Map 'pfn' using protections 'prot'
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*/
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void __iomem *
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iomap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot)
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{
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/*
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* For non-PAT systems, translate non-WB request to UC- just in
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* case the caller set the PWT bit to prot directly without using
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* pgprot_writecombine(). UC- translates to uncached if the MTRR
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* is UC or WC. UC- gets the real intention, of the user, which is
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* "WC if the MTRR is WC, UC if you can't do that."
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*/
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if (!pat_enabled() && pgprot2cachemode(prot) != _PAGE_CACHE_MODE_WB)
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prot = __pgprot(__PAGE_KERNEL |
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cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS));
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/* Filter out unsupported __PAGE_KERNEL* bits: */
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pgprot_val(prot) &= __default_kernel_pte_mask;
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return (void __force __iomem *) kmap_atomic_prot_pfn(pfn, prot);
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}
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EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn);
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void
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iounmap_atomic(void __iomem *kvaddr)
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{
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unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
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if (vaddr >= __fix_to_virt(FIX_KMAP_END) &&
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vaddr <= __fix_to_virt(FIX_KMAP_BEGIN)) {
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int idx, type;
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type = kmap_atomic_idx();
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idx = type + KM_TYPE_NR * smp_processor_id();
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#ifdef CONFIG_DEBUG_HIGHMEM
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WARN_ON_ONCE(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
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#endif
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/*
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* Force other mappings to Oops if they'll try to access this
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* pte without first remap it. Keeping stale mappings around
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* is a bad idea also, in case the page changes cacheability
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* attributes or becomes a protected page in a hypervisor.
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*/
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kpte_clear_flush(kmap_pte-idx, vaddr);
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kmap_atomic_idx_pop();
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}
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pagefault_enable();
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preempt_enable();
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}
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EXPORT_SYMBOL_GPL(iounmap_atomic);
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