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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3b79919946
Use the new bindings of the Marvell NAND controller driver. Also adapt the NAND controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as the new driver activates the arbiter by default for all boards which is either needed or harmless. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
358 lines
6.8 KiB
Plaintext
358 lines
6.8 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for NETGEAR ReadyNAS 2120
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*
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* Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-xp-mv78230.dtsi"
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/ {
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model = "NETGEAR ReadyNAS 2120";
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compatible = "netgear,readynas-2120", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0 0x00000000 0 0x80000000>; /* 2GB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
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MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
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internal-regs {
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/* RTC is provided by Intersil ISL12057 I2C RTC chip */
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rtc@10300 {
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status = "disabled";
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};
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i2c@11000 {
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clock-frequency = <400000>;
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status = "okay";
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/* Controller for rear fan #1 of 3 (Protechnic
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* MGT4012XB-O20, 8000RPM) near eSATA port */
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g762_fan1: g762@3e {
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compatible = "gmt,g762";
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reg = <0x3e>;
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clocks = <&g762_clk>; /* input clock */
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fan_gear_mode = <0>;
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fan_startv = <1>;
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pwm_polarity = <0>;
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};
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/* Controller for rear (center) fan #2 of 3 */
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g762_fan2: g762@48 {
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compatible = "gmt,g762";
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reg = <0x48>;
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clocks = <&g762_clk>; /* input clock */
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fan_gear_mode = <0>;
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fan_startv = <1>;
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pwm_polarity = <0>;
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};
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/* Controller for rear fan #3 of 3 */
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g762_fan3: g762@49 {
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compatible = "gmt,g762";
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reg = <0x49>;
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clocks = <&g762_clk>; /* input clock */
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fan_gear_mode = <0>;
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fan_startv = <1>;
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pwm_polarity = <0>;
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};
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/* Temperature sensor */
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g751: g751@4c {
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compatible = "gmt,g751";
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reg = <0x4c>;
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};
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isl12057: rtc@68 {
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compatible = "isil,isl12057";
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reg = <0x68>;
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wakeup-source;
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};
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};
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serial@12000 {
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status = "okay";
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};
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/* Front USB 2.0 port */
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usb@50000 {
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status = "okay";
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};
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ethernet@70000 {
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pinctrl-0 = <&ge0_rgmii_pins>;
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pinctrl-names = "default";
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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ethernet@74000 {
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pinctrl-0 = <&ge1_rgmii_pins>;
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pinctrl-names = "default";
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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/* Two rear eSATA ports */
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sata@a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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};
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};
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clocks {
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g762_clk: g762-oscillator {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&sata1_led_pin &sata2_led_pin &err_led_pin
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&sata3_led_pin &sata4_led_pin>;
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pinctrl-names = "default";
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red-sata1-led {
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label = "rn2120:red:sata1";
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gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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red-sata2-led {
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label = "rn2120:red:sata2";
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gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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red-sata3-led {
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label = "rn2120:red:sata3";
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gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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red-sata4-led {
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label = "rn2120:red:sata4";
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gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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red-err-led {
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label = "rn2120:red:err";
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gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&power_button_pin &reset_button_pin>;
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pinctrl-names = "default";
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power-button {
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label = "Power Button";
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linux,code = <KEY_POWER>;
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gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
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};
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reset-button {
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label = "Reset Button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-poweroff {
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compatible = "gpio-poweroff";
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pinctrl-0 = <&poweroff>;
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pinctrl-names = "default";
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gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
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};
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};
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&pciec {
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status = "okay";
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/* Connected to first Marvell 88SE9170 SATA controller */
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/* Connected to second Marvell 88SE9170 SATA controller */
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pcie@2,0 {
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/* Port 0, Lane 1 */
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status = "okay";
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};
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/* Connected to Fresco Logic FL1009 USB 3.0 controller */
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pcie@5,0 {
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/* Port 1, Lane 0 */
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status = "okay";
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};
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};
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&mdio {
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phy0: ethernet-phy@0 { /* Marvell 88E1318 */
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reg = <0>;
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};
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phy1: ethernet-phy@1 { /* Marvell 88E1318 */
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reg = <1>;
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};
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};
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&pinctrl {
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poweroff: poweroff {
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marvell,pins = "mpp42";
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marvell,function = "gpio";
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};
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power_button_pin: power-button-pin {
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marvell,pins = "mpp27";
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marvell,function = "gpio";
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};
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reset_button_pin: reset-button-pin {
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marvell,pins = "mpp41";
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marvell,function = "gpio";
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};
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sata1_led_pin: sata1-led-pin {
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marvell,pins = "mpp31";
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marvell,function = "gpio";
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};
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sata2_led_pin: sata2-led-pin {
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marvell,pins = "mpp40";
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marvell,function = "gpio";
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};
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sata3_led_pin: sata3-led-pin {
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marvell,pins = "mpp44";
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marvell,function = "gpio";
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};
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sata4_led_pin: sata4-led-pin {
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marvell,pins = "mpp47";
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marvell,function = "gpio";
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};
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sata1_power_pin: sata1-power-pin {
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marvell,pins = "mpp24";
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marvell,function = "gpio";
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};
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sata2_power_pin: sata2-power-pin {
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marvell,pins = "mpp25";
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marvell,function = "gpio";
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};
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sata3_power_pin: sata3-power-pin {
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marvell,pins = "mpp26";
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marvell,function = "gpio";
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};
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sata4_power_pin: sata4-power-pin {
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marvell,pins = "mpp28";
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marvell,function = "gpio";
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};
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sata1_pres_pin: sata1-pres-pin {
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marvell,pins = "mpp32";
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marvell,function = "gpio";
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};
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sata2_pres_pin: sata2-pres-pin {
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marvell,pins = "mpp33";
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marvell,function = "gpio";
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};
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sata3_pres_pin: sata3-pres-pin {
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marvell,pins = "mpp34";
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marvell,function = "gpio";
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};
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sata4_pres_pin: sata4-pres-pin {
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marvell,pins = "mpp35";
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marvell,function = "gpio";
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};
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err_led_pin: err-led-pin {
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marvell,pins = "mpp45";
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marvell,function = "gpio";
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};
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};
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&nand_controller {
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status = "okay";
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nand@0 {
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reg = <0>;
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label = "pxa3xx_nand-0";
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nand-rb = <0>;
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marvell,nand-keep-config;
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nand-on-flash-bbt;
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/* Use Hardware BCH ECC */
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0000000 0x180000>; /* 1.5MB */
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read-only;
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};
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partition@180000 {
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label = "u-boot-env";
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reg = <0x180000 0x20000>; /* 128KB */
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read-only;
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};
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partition@200000 {
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label = "uImage";
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reg = <0x0200000 0x600000>; /* 6MB */
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};
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partition@800000 {
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label = "minirootfs";
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reg = <0x0800000 0x400000>; /* 4MB */
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};
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/* Last MB is for the BBT, i.e. not writable */
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partition@c00000 {
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label = "ubifs";
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reg = <0x0c00000 0x7400000>; /* 116MB */
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};
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};
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};
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};
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