AuxXxilium/linux_dsm_epyc7002
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ecc8995363
linux_dsm_epyc7002/drivers/pinctrl/intel
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Mika Westerberg ecc8995363 pinctrl: broxton: Use correct PADCFGLOCK offset 
PADCFGLOCK (and PADCFGLOCK_TX) offset in Broxton actually starts at 0x060
and not 0x090 as used in the driver. Fix it to use the correct offset.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-11 13:47:11 +01:00
..
Kconfig pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
Makefile pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
pinctrl-baytrail.c pinctrl: intel: set default handler to be handle_bad_irq() 2016-12-07 15:26:59 +01:00
pinctrl-broxton.c pinctrl: broxton: Use correct PADCFGLOCK offset 2017-01-11 13:47:11 +01:00
pinctrl-cherryview.c Bulk pin control changes for the v4.10 kernel cycle: 2016-12-13 07:59:10 -08:00
pinctrl-intel.c pinctrl: intel: set default handler to be handle_bad_irq() 2016-12-07 15:26:59 +01:00
pinctrl-intel.h pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00
pinctrl-merrifield.c pinctrl: intel: merrifield: Add pin config group handlers 2016-10-29 10:33:47 +02:00
pinctrl-sunrisepoint.c pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00