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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4e65331c6b
As suggested by Russell King - ARM Linux <linux@arm.linux.org.uk>, there's no need to keep local prototypes in non-local headers. Add mach-omap1/common.h and mach-omap2/common.h and move the local prototypes there from plat/common.h and mach/omap4-common.h. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
108 lines
2.9 KiB
C
108 lines
2.9 KiB
C
/*
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* Helper module for board specific I2C bus registration
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*
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* Copyright (C) 2009 Nokia Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <plat/cpu.h>
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#include <plat/i2c.h>
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#include "common.h"
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#include <plat/omap_hwmod.h>
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#include "mux.h"
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/* In register I2C_CON, Bit 15 is the I2C enable bit */
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#define I2C_EN BIT(15)
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#define OMAP2_I2C_CON_OFFSET 0x24
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#define OMAP4_I2C_CON_OFFSET 0xA4
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/* Maximum microseconds to wait for OMAP module to softreset */
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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void __init omap2_i2c_mux_pins(int bus_id)
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{
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char mux_name[sizeof("i2c2_scl.i2c2_scl")];
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/* First I2C bus is not muxable */
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if (bus_id == 1)
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return;
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sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
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omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
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sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
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omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
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}
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/**
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* omap_i2c_reset - reset the omap i2c module.
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* @oh: struct omap_hwmod *
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*
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* The i2c moudle in omap2, omap3 had a special sequence to reset. The
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* sequence is:
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* - Disable the I2C.
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* - Write to SOFTRESET bit.
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* - Enable the I2C.
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* - Poll on the RESETDONE bit.
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* The sequence is implemented in below function. This is called for 2420,
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* 2430 and omap3.
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*/
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int omap_i2c_reset(struct omap_hwmod *oh)
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{
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u32 v;
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u16 i2c_con;
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int c = 0;
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if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
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i2c_con = OMAP4_I2C_CON_OFFSET;
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} else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
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i2c_con = OMAP2_I2C_CON_OFFSET;
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} else {
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WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
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oh->name);
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return -EINVAL;
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}
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/* Disable I2C */
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v = omap_hwmod_read(oh, i2c_con);
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v &= ~I2C_EN;
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omap_hwmod_write(v, oh, i2c_con);
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/* Write to the SOFTRESET bit */
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omap_hwmod_softreset(oh);
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/* Enable I2C */
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v = omap_hwmod_read(oh, i2c_con);
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v |= I2C_EN;
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omap_hwmod_write(v, oh, i2c_con);
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/* Poll on RESETDONE bit */
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omap_test_timeout((omap_hwmod_read(oh,
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oh->class->sysc->syss_offs)
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& SYSS_RESETDONE_MASK),
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MAX_MODULE_SOFTRESET_WAIT, c);
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if (c == MAX_MODULE_SOFTRESET_WAIT)
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pr_warning("%s: %s: softreset failed (waited %d usec)\n",
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__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
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else
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pr_debug("%s: %s: softreset in %d usec\n", __func__,
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oh->name, c);
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return 0;
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}
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