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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9b54d20176
RAS ECC event will combine with GPU reset event, due to ECC interrupts are caused by uncorrectable error that triggers GPU reset. v2: Fix misleading-indentation warning v3: fix build with CONFIG_HSA_AMD disabled Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1005 lines
30 KiB
C
1005 lines
30 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef KFD_PRIV_H_INCLUDED
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#define KFD_PRIV_H_INCLUDED
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#include <linux/hashtable.h>
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#include <linux/mmu_notifier.h>
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#include <linux/mutex.h>
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#include <linux/types.h>
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#include <linux/atomic.h>
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#include <linux/workqueue.h>
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#include <linux/spinlock.h>
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#include <linux/kfd_ioctl.h>
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#include <linux/idr.h>
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#include <linux/kfifo.h>
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#include <linux/seq_file.h>
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#include <linux/kref.h>
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#include <kgd_kfd_interface.h>
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#include "amd_shared.h"
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#define KFD_MAX_RING_ENTRY_SIZE 8
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#define KFD_SYSFS_FILE_MODE 0444
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/* GPU ID hash width in bits */
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#define KFD_GPU_ID_HASH_WIDTH 16
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/* Use upper bits of mmap offset to store KFD driver specific information.
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* BITS[63:62] - Encode MMAP type
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* BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to
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* BITS[45:0] - MMAP offset value
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*
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* NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these
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* defines are w.r.t to PAGE_SIZE
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*/
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#define KFD_MMAP_TYPE_SHIFT (62 - PAGE_SHIFT)
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#define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_GPU_ID_SHIFT (46 - PAGE_SHIFT)
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#define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \
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<< KFD_MMAP_GPU_ID_SHIFT)
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#define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\
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& KFD_MMAP_GPU_ID_MASK)
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#define KFD_MMAP_GPU_ID_GET(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \
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>> KFD_MMAP_GPU_ID_SHIFT)
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#define KFD_MMAP_OFFSET_VALUE_MASK (0x3FFFFFFFFFFFULL >> PAGE_SHIFT)
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#define KFD_MMAP_OFFSET_VALUE_GET(offset) (offset & KFD_MMAP_OFFSET_VALUE_MASK)
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/*
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* When working with cp scheduler we should assign the HIQ manually or via
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* the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot
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* definitions for Kaveri. In Kaveri only the first ME queues participates
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* in the cp scheduling taking that in mind we set the HIQ slot in the
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* second ME.
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*/
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#define KFD_CIK_HIQ_PIPE 4
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#define KFD_CIK_HIQ_QUEUE 0
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/* Macro for allocating structures */
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#define kfd_alloc_struct(ptr_to_struct) \
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((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL))
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#define KFD_MAX_NUM_OF_PROCESSES 512
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#define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024
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/*
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* Size of the per-process TBA+TMA buffer: 2 pages
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*
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* The first page is the TBA used for the CWSR ISA code. The second
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* page is used as TMA for daisy changing a user-mode trap handler.
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*/
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#define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2)
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#define KFD_CWSR_TMA_OFFSET PAGE_SIZE
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#define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \
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(KFD_MAX_NUM_OF_PROCESSES * \
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KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
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#define KFD_KERNEL_QUEUE_SIZE 2048
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/*
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* 512 = 0x200
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* The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the
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* same SDMA engine on SOC15, which has 8-byte doorbells for SDMA.
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* 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC
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* (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in
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* the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE.
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*/
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#define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512
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/*
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* Kernel module parameter to specify maximum number of supported queues per
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* device
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*/
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extern int max_num_of_queues_per_device;
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/* Kernel module parameter to specify the scheduling policy */
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extern int sched_policy;
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/*
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* Kernel module parameter to specify the maximum process
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* number per HW scheduler
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*/
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extern int hws_max_conc_proc;
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extern int cwsr_enable;
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/*
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* Kernel module parameter to specify whether to send sigterm to HSA process on
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* unhandled exception
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*/
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extern int send_sigterm;
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/*
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* This kernel module is used to simulate large bar machine on non-large bar
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* enabled machines.
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*/
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extern int debug_largebar;
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/*
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* Ignore CRAT table during KFD initialization, can be used to work around
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* broken CRAT tables on some AMD systems
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*/
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extern int ignore_crat;
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/*
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* Set sh_mem_config.retry_disable on Vega10
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*/
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extern int noretry;
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/*
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* Halt if HWS hang is detected
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*/
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extern int halt_if_hws_hang;
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enum cache_policy {
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cache_policy_coherent,
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cache_policy_noncoherent
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};
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#define KFD_IS_SOC15(chip) ((chip) >= CHIP_VEGA10)
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struct kfd_event_interrupt_class {
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bool (*interrupt_isr)(struct kfd_dev *dev,
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const uint32_t *ih_ring_entry, uint32_t *patched_ihre,
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bool *patched_flag);
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void (*interrupt_wq)(struct kfd_dev *dev,
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const uint32_t *ih_ring_entry);
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};
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struct kfd_device_info {
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enum amd_asic_type asic_family;
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const struct kfd_event_interrupt_class *event_interrupt_class;
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unsigned int max_pasid_bits;
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unsigned int max_no_of_hqd;
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unsigned int doorbell_size;
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size_t ih_ring_entry_size;
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uint8_t num_of_watch_points;
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uint16_t mqd_size_aligned;
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bool supports_cwsr;
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bool needs_iommu_device;
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bool needs_pci_atomics;
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unsigned int num_sdma_engines;
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unsigned int num_sdma_queues_per_engine;
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};
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struct kfd_mem_obj {
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uint32_t range_start;
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uint32_t range_end;
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uint64_t gpu_addr;
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uint32_t *cpu_ptr;
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void *gtt_mem;
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};
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struct kfd_vmid_info {
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uint32_t first_vmid_kfd;
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uint32_t last_vmid_kfd;
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uint32_t vmid_num_kfd;
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};
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struct kfd_dev {
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struct kgd_dev *kgd;
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const struct kfd_device_info *device_info;
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struct pci_dev *pdev;
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unsigned int id; /* topology stub index */
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phys_addr_t doorbell_base; /* Start of actual doorbells used by
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* KFD. It is aligned for mapping
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* into user mode
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*/
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size_t doorbell_id_offset; /* Doorbell offset (from KFD doorbell
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* to HW doorbell, GFX reserved some
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* at the start)
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*/
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u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells
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* page used by kernel queue
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*/
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struct kgd2kfd_shared_resources shared_resources;
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struct kfd_vmid_info vm_info;
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const struct kfd2kgd_calls *kfd2kgd;
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struct mutex doorbell_mutex;
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DECLARE_BITMAP(doorbell_available_index,
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KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
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void *gtt_mem;
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uint64_t gtt_start_gpu_addr;
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void *gtt_start_cpu_ptr;
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void *gtt_sa_bitmap;
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struct mutex gtt_sa_lock;
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unsigned int gtt_sa_chunk_size;
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unsigned int gtt_sa_num_of_chunks;
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/* Interrupts */
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struct kfifo ih_fifo;
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struct workqueue_struct *ih_wq;
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struct work_struct interrupt_work;
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spinlock_t interrupt_lock;
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/* QCM Device instance */
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struct device_queue_manager *dqm;
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bool init_complete;
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/*
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* Interrupts of interest to KFD are copied
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* from the HW ring into a SW ring.
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*/
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bool interrupts_active;
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/* Debug manager */
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struct kfd_dbgmgr *dbgmgr;
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/* Firmware versions */
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uint16_t mec_fw_version;
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uint16_t sdma_fw_version;
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/* Maximum process number mapped to HW scheduler */
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unsigned int max_proc_per_quantum;
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/* CWSR */
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bool cwsr_enabled;
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const void *cwsr_isa;
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unsigned int cwsr_isa_size;
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/* xGMI */
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uint64_t hive_id;
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bool pci_atomic_requested;
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/* SRAM ECC flag */
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atomic_t sram_ecc_flag;
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};
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enum kfd_mempool {
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KFD_MEMPOOL_SYSTEM_CACHEABLE = 1,
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KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2,
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KFD_MEMPOOL_FRAMEBUFFER = 3,
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};
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/* Character device interface */
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int kfd_chardev_init(void);
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void kfd_chardev_exit(void);
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struct device *kfd_chardev(void);
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/**
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* enum kfd_unmap_queues_filter
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*
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* @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue.
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*
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* @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the
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* running queues list.
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*
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* @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to
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* specific process.
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*
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*/
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enum kfd_unmap_queues_filter {
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KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE,
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KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES,
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KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES,
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KFD_UNMAP_QUEUES_FILTER_BY_PASID
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};
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/**
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* enum kfd_queue_type
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*
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* @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type.
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*
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* @KFD_QUEUE_TYPE_SDMA: Sdma user mode queue type.
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*
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* @KFD_QUEUE_TYPE_HIQ: HIQ queue type.
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*
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* @KFD_QUEUE_TYPE_DIQ: DIQ queue type.
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*/
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enum kfd_queue_type {
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KFD_QUEUE_TYPE_COMPUTE,
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KFD_QUEUE_TYPE_SDMA,
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KFD_QUEUE_TYPE_HIQ,
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KFD_QUEUE_TYPE_DIQ
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};
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enum kfd_queue_format {
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KFD_QUEUE_FORMAT_PM4,
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KFD_QUEUE_FORMAT_AQL
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};
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/**
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* struct queue_properties
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*
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* @type: The queue type.
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*
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* @queue_id: Queue identifier.
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*
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* @queue_address: Queue ring buffer address.
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*
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* @queue_size: Queue ring buffer size.
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*
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* @priority: Defines the queue priority relative to other queues in the
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* process.
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* This is just an indication and HW scheduling may override the priority as
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* necessary while keeping the relative prioritization.
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* the priority granularity is from 0 to f which f is the highest priority.
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* currently all queues are initialized with the highest priority.
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*
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* @queue_percent: This field is partially implemented and currently a zero in
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* this field defines that the queue is non active.
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*
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* @read_ptr: User space address which points to the number of dwords the
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* cp read from the ring buffer. This field updates automatically by the H/W.
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*
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* @write_ptr: Defines the number of dwords written to the ring buffer.
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*
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* @doorbell_ptr: This field aim is to notify the H/W of new packet written to
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* the queue ring buffer. This field should be similar to write_ptr and the
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* user should update this field after he updated the write_ptr.
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*
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* @doorbell_off: The doorbell offset in the doorbell pci-bar.
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*
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* @is_interop: Defines if this is a interop queue. Interop queue means that
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* the queue can access both graphics and compute resources.
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*
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* @is_evicted: Defines if the queue is evicted. Only active queues
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* are evicted, rendering them inactive.
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*
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* @is_active: Defines if the queue is active or not. @is_active and
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* @is_evicted are protected by the DQM lock.
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*
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* @vmid: If the scheduling mode is no cp scheduling the field defines the vmid
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* of the queue.
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*
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* This structure represents the queue properties for each queue no matter if
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* it's user mode or kernel mode queue.
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*
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*/
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struct queue_properties {
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enum kfd_queue_type type;
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enum kfd_queue_format format;
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unsigned int queue_id;
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uint64_t queue_address;
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uint64_t queue_size;
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uint32_t priority;
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uint32_t queue_percent;
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uint32_t *read_ptr;
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uint32_t *write_ptr;
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void __iomem *doorbell_ptr;
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uint32_t doorbell_off;
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bool is_interop;
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bool is_evicted;
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bool is_active;
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/* Not relevant for user mode queues in cp scheduling */
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unsigned int vmid;
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/* Relevant only for sdma queues*/
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uint32_t sdma_engine_id;
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uint32_t sdma_queue_id;
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uint32_t sdma_vm_addr;
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/* Relevant only for VI */
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uint64_t eop_ring_buffer_address;
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uint32_t eop_ring_buffer_size;
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uint64_t ctx_save_restore_area_address;
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uint32_t ctx_save_restore_area_size;
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uint32_t ctl_stack_size;
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uint64_t tba_addr;
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uint64_t tma_addr;
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/* Relevant for CU */
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uint32_t cu_mask_count; /* Must be a multiple of 32 */
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uint32_t *cu_mask;
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};
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/**
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* struct queue
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*
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* @list: Queue linked list.
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*
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* @mqd: The queue MQD.
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*
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* @mqd_mem_obj: The MQD local gpu memory object.
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*
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* @gart_mqd_addr: The MQD gart mc address.
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*
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* @properties: The queue properties.
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*
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* @mec: Used only in no cp scheduling mode and identifies to micro engine id
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* that the queue should be execute on.
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*
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* @pipe: Used only in no cp scheduling mode and identifies the queue's pipe
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* id.
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*
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* @queue: Used only in no cp scheduliong mode and identifies the queue's slot.
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*
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* @process: The kfd process that created this queue.
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*
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* @device: The kfd device that created this queue.
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*
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* This structure represents user mode compute queues.
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* It contains all the necessary data to handle such queues.
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*
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*/
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struct queue {
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struct list_head list;
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void *mqd;
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struct kfd_mem_obj *mqd_mem_obj;
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uint64_t gart_mqd_addr;
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struct queue_properties properties;
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uint32_t mec;
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uint32_t pipe;
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uint32_t queue;
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unsigned int sdma_id;
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unsigned int doorbell_id;
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struct kfd_process *process;
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struct kfd_dev *device;
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};
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/*
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* Please read the kfd_mqd_manager.h description.
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*/
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enum KFD_MQD_TYPE {
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KFD_MQD_TYPE_COMPUTE = 0, /* for no cp scheduling */
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KFD_MQD_TYPE_HIQ, /* for hiq */
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KFD_MQD_TYPE_CP, /* for cp queues and diq */
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KFD_MQD_TYPE_SDMA, /* for sdma queues */
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KFD_MQD_TYPE_MAX
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};
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struct scheduling_resources {
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unsigned int vmid_mask;
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enum kfd_queue_type type;
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uint64_t queue_mask;
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uint64_t gws_mask;
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uint32_t oac_mask;
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uint32_t gds_heap_base;
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uint32_t gds_heap_size;
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};
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struct process_queue_manager {
|
|
/* data */
|
|
struct kfd_process *process;
|
|
struct list_head queues;
|
|
unsigned long *queue_slot_bitmap;
|
|
};
|
|
|
|
struct qcm_process_device {
|
|
/* The Device Queue Manager that owns this data */
|
|
struct device_queue_manager *dqm;
|
|
struct process_queue_manager *pqm;
|
|
/* Queues list */
|
|
struct list_head queues_list;
|
|
struct list_head priv_queue_list;
|
|
|
|
unsigned int queue_count;
|
|
unsigned int vmid;
|
|
bool is_debug;
|
|
unsigned int evicted; /* eviction counter, 0=active */
|
|
|
|
/* This flag tells if we should reset all wavefronts on
|
|
* process termination
|
|
*/
|
|
bool reset_wavefronts;
|
|
|
|
/*
|
|
* All the memory management data should be here too
|
|
*/
|
|
uint64_t gds_context_area;
|
|
/* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */
|
|
uint64_t page_table_base;
|
|
uint32_t sh_mem_config;
|
|
uint32_t sh_mem_bases;
|
|
uint32_t sh_mem_ape1_base;
|
|
uint32_t sh_mem_ape1_limit;
|
|
uint32_t gds_size;
|
|
uint32_t num_gws;
|
|
uint32_t num_oac;
|
|
uint32_t sh_hidden_private_base;
|
|
|
|
/* CWSR memory */
|
|
void *cwsr_kaddr;
|
|
uint64_t cwsr_base;
|
|
uint64_t tba_addr;
|
|
uint64_t tma_addr;
|
|
|
|
/* IB memory */
|
|
uint64_t ib_base;
|
|
void *ib_kaddr;
|
|
|
|
/* doorbell resources per process per device */
|
|
unsigned long *doorbell_bitmap;
|
|
};
|
|
|
|
/* KFD Memory Eviction */
|
|
|
|
/* Approx. wait time before attempting to restore evicted BOs */
|
|
#define PROCESS_RESTORE_TIME_MS 100
|
|
/* Approx. back off time if restore fails due to lack of memory */
|
|
#define PROCESS_BACK_OFF_TIME_MS 100
|
|
/* Approx. time before evicting the process again */
|
|
#define PROCESS_ACTIVE_TIME_MS 10
|
|
|
|
/* 8 byte handle containing GPU ID in the most significant 4 bytes and
|
|
* idr_handle in the least significant 4 bytes
|
|
*/
|
|
#define MAKE_HANDLE(gpu_id, idr_handle) \
|
|
(((uint64_t)(gpu_id) << 32) + idr_handle)
|
|
#define GET_GPU_ID(handle) (handle >> 32)
|
|
#define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF)
|
|
|
|
enum kfd_pdd_bound {
|
|
PDD_UNBOUND = 0,
|
|
PDD_BOUND,
|
|
PDD_BOUND_SUSPENDED,
|
|
};
|
|
|
|
/* Data that is per-process-per device. */
|
|
struct kfd_process_device {
|
|
/*
|
|
* List of all per-device data for a process.
|
|
* Starts from kfd_process.per_device_data.
|
|
*/
|
|
struct list_head per_device_list;
|
|
|
|
/* The device that owns this data. */
|
|
struct kfd_dev *dev;
|
|
|
|
/* The process that owns this kfd_process_device. */
|
|
struct kfd_process *process;
|
|
|
|
/* per-process-per device QCM data structure */
|
|
struct qcm_process_device qpd;
|
|
|
|
/*Apertures*/
|
|
uint64_t lds_base;
|
|
uint64_t lds_limit;
|
|
uint64_t gpuvm_base;
|
|
uint64_t gpuvm_limit;
|
|
uint64_t scratch_base;
|
|
uint64_t scratch_limit;
|
|
|
|
/* VM context for GPUVM allocations */
|
|
struct file *drm_file;
|
|
void *vm;
|
|
|
|
/* GPUVM allocations storage */
|
|
struct idr alloc_idr;
|
|
|
|
/* Flag used to tell the pdd has dequeued from the dqm.
|
|
* This is used to prevent dev->dqm->ops.process_termination() from
|
|
* being called twice when it is already called in IOMMU callback
|
|
* function.
|
|
*/
|
|
bool already_dequeued;
|
|
|
|
/* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */
|
|
enum kfd_pdd_bound bound;
|
|
};
|
|
|
|
#define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd)
|
|
|
|
/* Process data */
|
|
struct kfd_process {
|
|
/*
|
|
* kfd_process are stored in an mm_struct*->kfd_process*
|
|
* hash table (kfd_processes in kfd_process.c)
|
|
*/
|
|
struct hlist_node kfd_processes;
|
|
|
|
/*
|
|
* Opaque pointer to mm_struct. We don't hold a reference to
|
|
* it so it should never be dereferenced from here. This is
|
|
* only used for looking up processes by their mm.
|
|
*/
|
|
void *mm;
|
|
|
|
struct kref ref;
|
|
struct work_struct release_work;
|
|
|
|
struct mutex mutex;
|
|
|
|
/*
|
|
* In any process, the thread that started main() is the lead
|
|
* thread and outlives the rest.
|
|
* It is here because amd_iommu_bind_pasid wants a task_struct.
|
|
* It can also be used for safely getting a reference to the
|
|
* mm_struct of the process.
|
|
*/
|
|
struct task_struct *lead_thread;
|
|
|
|
/* We want to receive a notification when the mm_struct is destroyed */
|
|
struct mmu_notifier mmu_notifier;
|
|
|
|
/* Use for delayed freeing of kfd_process structure */
|
|
struct rcu_head rcu;
|
|
|
|
unsigned int pasid;
|
|
unsigned int doorbell_index;
|
|
|
|
/*
|
|
* List of kfd_process_device structures,
|
|
* one for each device the process is using.
|
|
*/
|
|
struct list_head per_device_data;
|
|
|
|
struct process_queue_manager pqm;
|
|
|
|
/*Is the user space process 32 bit?*/
|
|
bool is_32bit_user_mode;
|
|
|
|
/* Event-related data */
|
|
struct mutex event_mutex;
|
|
/* Event ID allocator and lookup */
|
|
struct idr event_idr;
|
|
/* Event page */
|
|
struct kfd_signal_page *signal_page;
|
|
size_t signal_mapped_size;
|
|
size_t signal_event_count;
|
|
bool signal_event_limit_reached;
|
|
|
|
/* Information used for memory eviction */
|
|
void *kgd_process_info;
|
|
/* Eviction fence that is attached to all the BOs of this process. The
|
|
* fence will be triggered during eviction and new one will be created
|
|
* during restore
|
|
*/
|
|
struct dma_fence *ef;
|
|
|
|
/* Work items for evicting and restoring BOs */
|
|
struct delayed_work eviction_work;
|
|
struct delayed_work restore_work;
|
|
/* seqno of the last scheduled eviction */
|
|
unsigned int last_eviction_seqno;
|
|
/* Approx. the last timestamp (in jiffies) when the process was
|
|
* restored after an eviction
|
|
*/
|
|
unsigned long last_restore_timestamp;
|
|
};
|
|
|
|
#define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */
|
|
extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE);
|
|
extern struct srcu_struct kfd_processes_srcu;
|
|
|
|
/**
|
|
* Ioctl function type.
|
|
*
|
|
* \param filep pointer to file structure.
|
|
* \param p amdkfd process pointer.
|
|
* \param data pointer to arg that was copied from user.
|
|
*/
|
|
typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p,
|
|
void *data);
|
|
|
|
struct amdkfd_ioctl_desc {
|
|
unsigned int cmd;
|
|
int flags;
|
|
amdkfd_ioctl_t *func;
|
|
unsigned int cmd_drv;
|
|
const char *name;
|
|
};
|
|
bool kfd_dev_is_large_bar(struct kfd_dev *dev);
|
|
|
|
int kfd_process_create_wq(void);
|
|
void kfd_process_destroy_wq(void);
|
|
struct kfd_process *kfd_create_process(struct file *filep);
|
|
struct kfd_process *kfd_get_process(const struct task_struct *);
|
|
struct kfd_process *kfd_lookup_process_by_pasid(unsigned int pasid);
|
|
struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm);
|
|
void kfd_unref_process(struct kfd_process *p);
|
|
int kfd_process_evict_queues(struct kfd_process *p);
|
|
int kfd_process_restore_queues(struct kfd_process *p);
|
|
void kfd_suspend_all_processes(void);
|
|
int kfd_resume_all_processes(void);
|
|
|
|
int kfd_process_device_init_vm(struct kfd_process_device *pdd,
|
|
struct file *drm_file);
|
|
struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev,
|
|
struct kfd_process *p);
|
|
struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev,
|
|
struct kfd_process *p);
|
|
struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev,
|
|
struct kfd_process *p);
|
|
|
|
int kfd_reserved_mem_mmap(struct kfd_dev *dev, struct kfd_process *process,
|
|
struct vm_area_struct *vma);
|
|
|
|
/* KFD process API for creating and translating handles */
|
|
int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd,
|
|
void *mem);
|
|
void *kfd_process_device_translate_handle(struct kfd_process_device *p,
|
|
int handle);
|
|
void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd,
|
|
int handle);
|
|
|
|
/* Process device data iterator */
|
|
struct kfd_process_device *kfd_get_first_process_device_data(
|
|
struct kfd_process *p);
|
|
struct kfd_process_device *kfd_get_next_process_device_data(
|
|
struct kfd_process *p,
|
|
struct kfd_process_device *pdd);
|
|
bool kfd_has_process_device_data(struct kfd_process *p);
|
|
|
|
/* PASIDs */
|
|
int kfd_pasid_init(void);
|
|
void kfd_pasid_exit(void);
|
|
bool kfd_set_pasid_limit(unsigned int new_limit);
|
|
unsigned int kfd_get_pasid_limit(void);
|
|
unsigned int kfd_pasid_alloc(void);
|
|
void kfd_pasid_free(unsigned int pasid);
|
|
|
|
/* Doorbells */
|
|
size_t kfd_doorbell_process_slice(struct kfd_dev *kfd);
|
|
int kfd_doorbell_init(struct kfd_dev *kfd);
|
|
void kfd_doorbell_fini(struct kfd_dev *kfd);
|
|
int kfd_doorbell_mmap(struct kfd_dev *dev, struct kfd_process *process,
|
|
struct vm_area_struct *vma);
|
|
void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
|
|
unsigned int *doorbell_off);
|
|
void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr);
|
|
u32 read_kernel_doorbell(u32 __iomem *db);
|
|
void write_kernel_doorbell(void __iomem *db, u32 value);
|
|
void write_kernel_doorbell64(void __iomem *db, u64 value);
|
|
unsigned int kfd_doorbell_id_to_offset(struct kfd_dev *kfd,
|
|
struct kfd_process *process,
|
|
unsigned int doorbell_id);
|
|
phys_addr_t kfd_get_process_doorbells(struct kfd_dev *dev,
|
|
struct kfd_process *process);
|
|
int kfd_alloc_process_doorbells(struct kfd_process *process);
|
|
void kfd_free_process_doorbells(struct kfd_process *process);
|
|
|
|
/* GTT Sub-Allocator */
|
|
|
|
int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
|
|
struct kfd_mem_obj **mem_obj);
|
|
|
|
int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj);
|
|
|
|
extern struct device *kfd_device;
|
|
|
|
/* Topology */
|
|
int kfd_topology_init(void);
|
|
void kfd_topology_shutdown(void);
|
|
int kfd_topology_add_device(struct kfd_dev *gpu);
|
|
int kfd_topology_remove_device(struct kfd_dev *gpu);
|
|
struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
|
|
uint32_t proximity_domain);
|
|
struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id);
|
|
struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);
|
|
struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev);
|
|
struct kfd_dev *kfd_device_by_kgd(const struct kgd_dev *kgd);
|
|
int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev);
|
|
int kfd_numa_node_to_apic_id(int numa_node_id);
|
|
|
|
/* Interrupts */
|
|
int kfd_interrupt_init(struct kfd_dev *dev);
|
|
void kfd_interrupt_exit(struct kfd_dev *dev);
|
|
bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry);
|
|
bool interrupt_is_wanted(struct kfd_dev *dev,
|
|
const uint32_t *ih_ring_entry,
|
|
uint32_t *patched_ihre, bool *flag);
|
|
|
|
/* amdkfd Apertures */
|
|
int kfd_init_apertures(struct kfd_process *process);
|
|
|
|
/* Queue Context Management */
|
|
int init_queue(struct queue **q, const struct queue_properties *properties);
|
|
void uninit_queue(struct queue *q);
|
|
void print_queue_properties(struct queue_properties *q);
|
|
void print_queue(struct queue *q);
|
|
|
|
struct mqd_manager *mqd_manager_init(enum KFD_MQD_TYPE type,
|
|
struct kfd_dev *dev);
|
|
struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
|
|
struct kfd_dev *dev);
|
|
struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type,
|
|
struct kfd_dev *dev);
|
|
struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type,
|
|
struct kfd_dev *dev);
|
|
struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type,
|
|
struct kfd_dev *dev);
|
|
struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
|
|
struct kfd_dev *dev);
|
|
struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev);
|
|
void device_queue_manager_uninit(struct device_queue_manager *dqm);
|
|
struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
|
|
enum kfd_queue_type type);
|
|
void kernel_queue_uninit(struct kernel_queue *kq);
|
|
int kfd_process_vm_fault(struct device_queue_manager *dqm, unsigned int pasid);
|
|
|
|
/* Process Queue Manager */
|
|
struct process_queue_node {
|
|
struct queue *q;
|
|
struct kernel_queue *kq;
|
|
struct list_head process_queue_list;
|
|
};
|
|
|
|
void kfd_process_dequeue_from_device(struct kfd_process_device *pdd);
|
|
void kfd_process_dequeue_from_all_devices(struct kfd_process *p);
|
|
int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p);
|
|
void pqm_uninit(struct process_queue_manager *pqm);
|
|
int pqm_create_queue(struct process_queue_manager *pqm,
|
|
struct kfd_dev *dev,
|
|
struct file *f,
|
|
struct queue_properties *properties,
|
|
unsigned int *qid);
|
|
int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid);
|
|
int pqm_update_queue(struct process_queue_manager *pqm, unsigned int qid,
|
|
struct queue_properties *p);
|
|
int pqm_set_cu_mask(struct process_queue_manager *pqm, unsigned int qid,
|
|
struct queue_properties *p);
|
|
struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm,
|
|
unsigned int qid);
|
|
int pqm_get_wave_state(struct process_queue_manager *pqm,
|
|
unsigned int qid,
|
|
void __user *ctl_stack,
|
|
u32 *ctl_stack_used_size,
|
|
u32 *save_area_used_size);
|
|
|
|
int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
|
|
unsigned int fence_value,
|
|
unsigned int timeout_ms);
|
|
|
|
/* Packet Manager */
|
|
|
|
#define KFD_FENCE_COMPLETED (100)
|
|
#define KFD_FENCE_INIT (10)
|
|
|
|
struct packet_manager {
|
|
struct device_queue_manager *dqm;
|
|
struct kernel_queue *priv_queue;
|
|
struct mutex lock;
|
|
bool allocated;
|
|
struct kfd_mem_obj *ib_buffer_obj;
|
|
unsigned int ib_size_bytes;
|
|
|
|
const struct packet_manager_funcs *pmf;
|
|
};
|
|
|
|
struct packet_manager_funcs {
|
|
/* Support ASIC-specific packet formats for PM4 packets */
|
|
int (*map_process)(struct packet_manager *pm, uint32_t *buffer,
|
|
struct qcm_process_device *qpd);
|
|
int (*runlist)(struct packet_manager *pm, uint32_t *buffer,
|
|
uint64_t ib, size_t ib_size_in_dwords, bool chain);
|
|
int (*set_resources)(struct packet_manager *pm, uint32_t *buffer,
|
|
struct scheduling_resources *res);
|
|
int (*map_queues)(struct packet_manager *pm, uint32_t *buffer,
|
|
struct queue *q, bool is_static);
|
|
int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer,
|
|
enum kfd_queue_type type,
|
|
enum kfd_unmap_queues_filter mode,
|
|
uint32_t filter_param, bool reset,
|
|
unsigned int sdma_engine);
|
|
int (*query_status)(struct packet_manager *pm, uint32_t *buffer,
|
|
uint64_t fence_address, uint32_t fence_value);
|
|
int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer);
|
|
|
|
/* Packet sizes */
|
|
int map_process_size;
|
|
int runlist_size;
|
|
int set_resources_size;
|
|
int map_queues_size;
|
|
int unmap_queues_size;
|
|
int query_status_size;
|
|
int release_mem_size;
|
|
};
|
|
|
|
extern const struct packet_manager_funcs kfd_vi_pm_funcs;
|
|
extern const struct packet_manager_funcs kfd_v9_pm_funcs;
|
|
|
|
int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
|
|
void pm_uninit(struct packet_manager *pm);
|
|
int pm_send_set_resources(struct packet_manager *pm,
|
|
struct scheduling_resources *res);
|
|
int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues);
|
|
int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
|
|
uint32_t fence_value);
|
|
|
|
int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
|
|
enum kfd_unmap_queues_filter mode,
|
|
uint32_t filter_param, bool reset,
|
|
unsigned int sdma_engine);
|
|
|
|
void pm_release_ib(struct packet_manager *pm);
|
|
|
|
/* Following PM funcs can be shared among VI and AI */
|
|
unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size);
|
|
int pm_set_resources_vi(struct packet_manager *pm, uint32_t *buffer,
|
|
struct scheduling_resources *res);
|
|
|
|
uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
|
|
|
|
/* Events */
|
|
extern const struct kfd_event_interrupt_class event_interrupt_class_cik;
|
|
extern const struct kfd_event_interrupt_class event_interrupt_class_v9;
|
|
|
|
extern const struct kfd_device_global_init_class device_global_init_class_cik;
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void kfd_event_init_process(struct kfd_process *p);
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void kfd_event_free_process(struct kfd_process *p);
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int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma);
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int kfd_wait_on_events(struct kfd_process *p,
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uint32_t num_events, void __user *data,
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bool all, uint32_t user_timeout_ms,
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uint32_t *wait_result);
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void kfd_signal_event_interrupt(unsigned int pasid, uint32_t partial_id,
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uint32_t valid_id_bits);
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void kfd_signal_iommu_event(struct kfd_dev *dev,
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unsigned int pasid, unsigned long address,
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bool is_write_requested, bool is_execute_requested);
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void kfd_signal_hw_exception_event(unsigned int pasid);
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int kfd_set_event(struct kfd_process *p, uint32_t event_id);
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int kfd_reset_event(struct kfd_process *p, uint32_t event_id);
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int kfd_event_page_set(struct kfd_process *p, void *kernel_address,
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uint64_t size);
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int kfd_event_create(struct file *devkfd, struct kfd_process *p,
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uint32_t event_type, bool auto_reset, uint32_t node_id,
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uint32_t *event_id, uint32_t *event_trigger_data,
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uint64_t *event_page_offset, uint32_t *event_slot_index);
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int kfd_event_destroy(struct kfd_process *p, uint32_t event_id);
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void kfd_signal_vm_fault_event(struct kfd_dev *dev, unsigned int pasid,
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struct kfd_vm_fault_info *info);
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void kfd_signal_reset_event(struct kfd_dev *dev);
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void kfd_flush_tlb(struct kfd_process_device *pdd);
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int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p);
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bool kfd_is_locked(void);
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/* Debugfs */
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#if defined(CONFIG_DEBUG_FS)
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void kfd_debugfs_init(void);
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void kfd_debugfs_fini(void);
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int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data);
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int pqm_debugfs_mqds(struct seq_file *m, void *data);
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int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data);
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int dqm_debugfs_hqds(struct seq_file *m, void *data);
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int kfd_debugfs_rls_by_device(struct seq_file *m, void *data);
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int pm_debugfs_runlist(struct seq_file *m, void *data);
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int kfd_debugfs_hang_hws(struct kfd_dev *dev);
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int pm_debugfs_hang_hws(struct packet_manager *pm);
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int dqm_debugfs_execute_queues(struct device_queue_manager *dqm);
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#else
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static inline void kfd_debugfs_init(void) {}
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static inline void kfd_debugfs_fini(void) {}
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#endif
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#endif
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