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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ce6e118846
This clock driver implements PIC32 specific clock-tree. clock-tree entities can only be configured through device-tree file (OF). Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-clk@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13247/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
85 lines
2.5 KiB
C
85 lines
2.5 KiB
C
/*
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* Purna Chandra Mandal,<purna.mandal@microchip.com>
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* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#ifndef __MICROCHIP_CLK_PIC32_H_
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#define __MICROCHIP_CLK_PIC32_H_
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#include <linux/clk-provider.h>
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/* PIC32 clock data */
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struct pic32_clk_common {
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struct device *dev;
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void __iomem *iobase;
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spinlock_t reg_lock; /* clock lock */
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};
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/* System PLL clock */
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struct pic32_sys_pll_data {
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struct clk_init_data init_data;
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const u32 ctrl_reg;
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const u32 status_reg;
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const u32 lock_mask;
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};
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/* System clock */
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struct pic32_sys_clk_data {
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struct clk_init_data init_data;
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const u32 mux_reg;
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const u32 slew_reg;
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const u32 *parent_map;
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const u32 slew_div;
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};
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/* Reference Oscillator clock */
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struct pic32_ref_osc_data {
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struct clk_init_data init_data;
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const u32 ctrl_reg;
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const u32 *parent_map;
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};
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/* Peripheral Bus clock */
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struct pic32_periph_clk_data {
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struct clk_init_data init_data;
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const u32 ctrl_reg;
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};
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/* External Secondary Oscillator clock */
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struct pic32_sec_osc_data {
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struct clk_init_data init_data;
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const u32 enable_reg;
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const u32 status_reg;
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const u32 enable_mask;
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const u32 status_mask;
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const unsigned long fixed_rate;
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};
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extern const struct clk_ops pic32_pbclk_ops;
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extern const struct clk_ops pic32_sclk_ops;
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extern const struct clk_ops pic32_sclk_no_div_ops;
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extern const struct clk_ops pic32_spll_ops;
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extern const struct clk_ops pic32_roclk_ops;
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extern const struct clk_ops pic32_sosc_ops;
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struct clk *pic32_periph_clk_register(const struct pic32_periph_clk_data *data,
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struct pic32_clk_common *core);
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struct clk *pic32_refo_clk_register(const struct pic32_ref_osc_data *data,
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struct pic32_clk_common *core);
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struct clk *pic32_sys_clk_register(const struct pic32_sys_clk_data *data,
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struct pic32_clk_common *core);
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struct clk *pic32_spll_clk_register(const struct pic32_sys_pll_data *data,
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struct pic32_clk_common *core);
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struct clk *pic32_sosc_clk_register(const struct pic32_sec_osc_data *data,
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struct pic32_clk_common *core);
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#endif /* __MICROCHIP_CLK_PIC32_H_*/
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