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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4fdfa8623d
The exynos low-level debug macros need to be fixed if the system is being built big endian. Add the necessary endian swaps for accessing the registers to get output working again Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
96 lines
2.0 KiB
ArmAsm
96 lines
2.0 KiB
ArmAsm
/* arch/arm/plat-samsung/include/plat/debug-macro.S
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*
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* Copyright 2005, 2007 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/serial_s3c.h>
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/* The S5PV210/S5PC110 implementations are as belows. */
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.macro fifo_level_s5pv210 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ARM_BE8(rev \rd, \rd)
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and \rd, \rd, #S5PV210_UFSTAT_TXMASK
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.endm
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.macro fifo_full_s5pv210 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S5PV210_UFSTAT_TXFULL
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.endm
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/* The S3C2440 implementations are used by default as they are the
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* most widely re-used */
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.macro fifo_level_s3c2440 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ARM_BE8(rev \rd, \rd)
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and \rd, \rd, #S3C2440_UFSTAT_TXMASK
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.endm
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#ifndef fifo_level
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#define fifo_level fifo_level_s3c2440
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#endif
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.macro fifo_full_s3c2440 rd, rx
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ldr \rd, [\rx, # S3C2410_UFSTAT]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2440_UFSTAT_TXFULL
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.endm
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#ifndef fifo_full
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#define fifo_full fifo_full_s3c2440
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#endif
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.macro senduart,rd,rx
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strb \rd, [\rx, # S3C2410_UTXH]
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.endm
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.macro busyuart, rd, rx
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ldr \rd, [\rx, # S3C2410_UFCON]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
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beq 1001f @
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@ FIFO enabled...
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1003:
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fifo_full \rd, \rx
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bne 1003b
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b 1002f
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1001:
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@ busy waiting for non fifo
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ldr \rd, [\rx, # S3C2410_UTRSTAT]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2410_UTRSTAT_TXFE
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beq 1001b
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1002: @ exit busyuart
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.endm
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.macro waituart,rd,rx
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ldr \rd, [\rx, # S3C2410_UFCON]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
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beq 1001f @
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@ FIFO enabled...
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1003:
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fifo_level \rd, \rx
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teq \rd, #0
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bne 1003b
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b 1002f
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1001:
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@ idle waiting for non fifo
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ldr \rd, [\rx, # S3C2410_UTRSTAT]
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ARM_BE8(rev \rd, \rd)
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tst \rd, #S3C2410_UTRSTAT_TXFE
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beq 1001b
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1002: @ exit busyuart
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.endm
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