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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ec4016ff6e
Clocks related to DISP, GSC and MFC blocks require special handling for power domain turn on/off sequences. Till now this was handled by Exynos power domain driver, but that approach was limited only to some special cases. This patch moves handling of those operations to clock controller driver. This gives more flexibility and allows fine tune values of some clock-specific registers. This patch moves handling of those mentioned clocks to Exynos5 sub-CMU driver instantiated from Exynos5420 driver. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
26 lines
1.1 KiB
Makefile
26 lines
1.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Samsung Clock specific Makefile
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#
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obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o clk-cpu.o
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obj-$(CONFIG_SOC_EXYNOS3250) += clk-exynos3250.o
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obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o
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obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4412-isp.o
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obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o
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obj-$(CONFIG_SOC_EXYNOS5260) += clk-exynos5260.o
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obj-$(CONFIG_SOC_EXYNOS5410) += clk-exynos5410.o
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obj-$(CONFIG_SOC_EXYNOS5420) += clk-exynos5420.o
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obj-$(CONFIG_SOC_EXYNOS5420) += clk-exynos5-subcmu.o
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obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos5433.o
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obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o
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obj-$(CONFIG_EXYNOS_AUDSS_CLK_CON) += clk-exynos-audss.o
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obj-$(CONFIG_ARCH_EXYNOS) += clk-exynos-clkout.o
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obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7.o
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obj-$(CONFIG_S3C2410_COMMON_CLK)+= clk-s3c2410.o
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obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o
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obj-$(CONFIG_S3C2412_COMMON_CLK)+= clk-s3c2412.o
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obj-$(CONFIG_S3C2443_COMMON_CLK)+= clk-s3c2443.o
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obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
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obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o clk-s5pv210-audss.o
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