Daniel Vetter ec3d65082d radeon: insert 10ms sleep in dce5_crtc_load_lut ... Per at least one tester this is enough magic to recover the regression introduced for some people (but not all) in commit b8e2b0199c Author: Peter Rosin <peda@axentia.se> Date: Tue Jul 4 12:36:57 2017 +0200 drm/fb-helper: factor out pseudo-palette which for radeon had the side-effect of refactoring out a seemingly redudant writing of the color palette. 10ms in a fairly slow modeset path feels like an acceptable form of duct-tape, so maybe worth a shot and see what sticks. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Michel Dänzer <michel.daenzer@amd.com> References: https://bugzilla.kernel.org/show_bug.cgi?id=198123 Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-01-30 17:15:42 -05:00
..
drm	radeon: insert 10ms sleep in dce5_crtc_load_lut	2020-01-30 17:15:42 -05:00
host1x	drm/tegra: Changes for v5.6-rc1	2020-01-15 16:21:28 +10:00
ipu-v3
vga
Makefile