mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
cd45832069
Similar to the X540 hardware, enable support for generating a 1pps output signal on SDP0. This support is slightly different to the X540 hardware, because of the register layout changes. First, the system time register is now represented in 'cycles' and 'billions of cycles'. Second, we need to also program the TSSDP register, as well as the ESDP register. Third, the clock output uses only FREQOUT, instead of a full 64bit value for the output clock period. Finally, we have to use the ST0 bit instead of the SYNCLK bit in the TSAUXC register. This support should work even for the hardware with a higher frequency clock, as it carefully takes into account the multiply and shift of the cycle counter used. We also set the pps configuration to 1, since we now support generating a pulse per second output. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
||
|---|---|---|
| .. | ||
| ixgbe_82598.c | ||
| ixgbe_82599.c | ||
| ixgbe_common.c | ||
| ixgbe_common.h | ||
| ixgbe_dcb_82598.c | ||
| ixgbe_dcb_82598.h | ||
| ixgbe_dcb_82599.c | ||
| ixgbe_dcb_82599.h | ||
| ixgbe_dcb_nl.c | ||
| ixgbe_dcb.c | ||
| ixgbe_dcb.h | ||
| ixgbe_debugfs.c | ||
| ixgbe_ethtool.c | ||
| ixgbe_fcoe.c | ||
| ixgbe_fcoe.h | ||
| ixgbe_ipsec.c | ||
| ixgbe_ipsec.h | ||
| ixgbe_lib.c | ||
| ixgbe_main.c | ||
| ixgbe_mbx.c | ||
| ixgbe_mbx.h | ||
| ixgbe_model.h | ||
| ixgbe_phy.c | ||
| ixgbe_phy.h | ||
| ixgbe_ptp.c | ||
| ixgbe_sriov.c | ||
| ixgbe_sriov.h | ||
| ixgbe_sysfs.c | ||
| ixgbe_txrx_common.h | ||
| ixgbe_type.h | ||
| ixgbe_x540.c | ||
| ixgbe_x540.h | ||
| ixgbe_x550.c | ||
| ixgbe_xsk.c | ||
| ixgbe.h | ||
| Makefile | ||