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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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eb8b8f2e71
this patche deletes hard code that registers clkdev by things like: clk_register_clkdev(clk, NULL, "b0030000.nand"); clk_register_clkdev(clk, NULL, "b0040000.audio"); clk_register_clkdev(clk, NULL, "b0080000.usp"); prima2 clock controller becomes a clock provider and every dt node just declares its clock sources by dt prop. it also makes us easier to extend this driver to support both prima2 and marco as marco has different address mapping with prima2. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |
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| .. | ||
| mmp | ||
| mvebu | ||
| mxs | ||
| socfpga | ||
| spear | ||
| ux500 | ||
| versatile | ||
| clk-bcm2835.c | ||
| clk-devres.c | ||
| clk-divider.c | ||
| clk-fixed-factor.c | ||
| clk-fixed-rate.c | ||
| clk-gate.c | ||
| clk-highbank.c | ||
| clk-ls1x.c | ||
| clk-max77686.c | ||
| clk-mux.c | ||
| clk-nomadik.c | ||
| clk-prima2.c | ||
| clk-sunxi.c | ||
| clk-twl6040.c | ||
| clk-u300.c | ||
| clk-vt8500.c | ||
| clk-wm831x.c | ||
| clk-zynq.c | ||
| clk.c | ||
| clkdev.c | ||
| Kconfig | ||
| Makefile | ||