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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
518a2f1925
If we want to map memory from the DMA allocator to userspace it must be zeroed at allocation time to prevent stale data leaks. We already do this on most common architectures, but some architectures don't do this yet, fix them up, either by passing GFP_ZERO when we use the normal page allocator or doing a manual memset otherwise. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> [m68k] Acked-by: Sam Ravnborg <sam@ravnborg.org> [sparc]
292 lines
7.7 KiB
C
292 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* io-unit.c: IO-UNIT specific routines for memory management.
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*
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* Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/highmem.h> /* pte_offset_map => kmap_atomic */
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#include <linux/bitops.h>
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#include <linux/dma-mapping.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/io.h>
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#include <asm/io-unit.h>
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#include <asm/mxcc.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/dma.h>
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#include <asm/oplib.h>
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#include "mm_32.h"
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/* #define IOUNIT_DEBUG */
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#ifdef IOUNIT_DEBUG
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#define IOD(x) printk(x)
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#else
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#define IOD(x) do { } while (0)
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#endif
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#define IOPERM (IOUPTE_CACHE | IOUPTE_WRITE | IOUPTE_VALID)
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#define MKIOPTE(phys) __iopte((((phys)>>4) & IOUPTE_PAGE) | IOPERM)
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static void __init iounit_iommu_init(struct platform_device *op)
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{
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struct iounit_struct *iounit;
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iopte_t __iomem *xpt;
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iopte_t __iomem *xptend;
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iounit = kzalloc(sizeof(struct iounit_struct), GFP_ATOMIC);
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if (!iounit) {
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prom_printf("SUN4D: Cannot alloc iounit, halting.\n");
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prom_halt();
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}
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iounit->limit[0] = IOUNIT_BMAP1_START;
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iounit->limit[1] = IOUNIT_BMAP2_START;
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iounit->limit[2] = IOUNIT_BMAPM_START;
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iounit->limit[3] = IOUNIT_BMAPM_END;
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iounit->rotor[1] = IOUNIT_BMAP2_START;
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iounit->rotor[2] = IOUNIT_BMAPM_START;
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xpt = of_ioremap(&op->resource[2], 0, PAGE_SIZE * 16, "XPT");
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if (!xpt) {
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prom_printf("SUN4D: Cannot map External Page Table.");
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prom_halt();
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}
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op->dev.archdata.iommu = iounit;
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iounit->page_table = xpt;
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spin_lock_init(&iounit->lock);
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xptend = iounit->page_table + (16 * PAGE_SIZE) / sizeof(iopte_t);
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for (; xpt < xptend; xpt++)
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sbus_writel(0, xpt);
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}
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static int __init iounit_init(void)
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{
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extern void sun4d_init_sbi_irq(void);
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struct device_node *dp;
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for_each_node_by_name(dp, "sbi") {
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struct platform_device *op = of_find_device_by_node(dp);
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iounit_iommu_init(op);
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of_propagate_archdata(op);
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}
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sun4d_init_sbi_irq();
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return 0;
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}
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subsys_initcall(iounit_init);
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/* One has to hold iounit->lock to call this */
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static unsigned long iounit_get_area(struct iounit_struct *iounit, unsigned long vaddr, int size)
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{
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int i, j, k, npages;
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unsigned long rotor, scan, limit;
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iopte_t iopte;
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npages = ((vaddr & ~PAGE_MASK) + size + (PAGE_SIZE-1)) >> PAGE_SHIFT;
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/* A tiny bit of magic ingredience :) */
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switch (npages) {
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case 1: i = 0x0231; break;
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case 2: i = 0x0132; break;
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default: i = 0x0213; break;
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}
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IOD(("iounit_get_area(%08lx,%d[%d])=", vaddr, size, npages));
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next: j = (i & 15);
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rotor = iounit->rotor[j - 1];
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limit = iounit->limit[j];
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scan = rotor;
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nexti: scan = find_next_zero_bit(iounit->bmap, limit, scan);
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if (scan + npages > limit) {
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if (limit != rotor) {
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limit = rotor;
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scan = iounit->limit[j - 1];
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goto nexti;
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}
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i >>= 4;
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if (!(i & 15))
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panic("iounit_get_area: Couldn't find free iopte slots for (%08lx,%d)\n", vaddr, size);
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goto next;
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}
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for (k = 1, scan++; k < npages; k++)
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if (test_bit(scan++, iounit->bmap))
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goto nexti;
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iounit->rotor[j - 1] = (scan < limit) ? scan : iounit->limit[j - 1];
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scan -= npages;
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iopte = MKIOPTE(__pa(vaddr & PAGE_MASK));
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vaddr = IOUNIT_DMA_BASE + (scan << PAGE_SHIFT) + (vaddr & ~PAGE_MASK);
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for (k = 0; k < npages; k++, iopte = __iopte(iopte_val(iopte) + 0x100), scan++) {
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set_bit(scan, iounit->bmap);
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sbus_writel(iopte_val(iopte), &iounit->page_table[scan]);
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}
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IOD(("%08lx\n", vaddr));
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return vaddr;
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}
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static dma_addr_t iounit_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t len, enum dma_data_direction dir,
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unsigned long attrs)
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{
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void *vaddr = page_address(page) + offset;
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long ret, flags;
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (!len || len > 256 * 1024)
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return DMA_MAPPING_ERROR;
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spin_lock_irqsave(&iounit->lock, flags);
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ret = iounit_get_area(iounit, (unsigned long)vaddr, len);
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spin_unlock_irqrestore(&iounit->lock, flags);
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return ret;
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}
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static int iounit_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
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enum dma_data_direction dir, unsigned long attrs)
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{
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struct iounit_struct *iounit = dev->archdata.iommu;
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struct scatterlist *sg;
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unsigned long flags;
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int i;
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/* FIXME: Cache some resolved pages - often several sg entries are to the same page */
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spin_lock_irqsave(&iounit->lock, flags);
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for_each_sg(sgl, sg, nents, i) {
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sg->dma_address = iounit_get_area(iounit, (unsigned long) sg_virt(sg), sg->length);
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sg->dma_length = sg->length;
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}
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spin_unlock_irqrestore(&iounit->lock, flags);
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return nents;
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}
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static void iounit_unmap_page(struct device *dev, dma_addr_t vaddr, size_t len,
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enum dma_data_direction dir, unsigned long attrs)
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{
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long flags;
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spin_lock_irqsave(&iounit->lock, flags);
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len = ((vaddr & ~PAGE_MASK) + len + (PAGE_SIZE-1)) >> PAGE_SHIFT;
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vaddr = (vaddr - IOUNIT_DMA_BASE) >> PAGE_SHIFT;
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IOD(("iounit_release %08lx-%08lx\n", (long)vaddr, (long)len+vaddr));
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for (len += vaddr; vaddr < len; vaddr++)
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clear_bit(vaddr, iounit->bmap);
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spin_unlock_irqrestore(&iounit->lock, flags);
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}
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static void iounit_unmap_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction dir, unsigned long attrs)
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{
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long flags, vaddr, len;
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struct scatterlist *sg;
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int i;
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spin_lock_irqsave(&iounit->lock, flags);
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for_each_sg(sgl, sg, nents, i) {
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len = ((sg->dma_address & ~PAGE_MASK) + sg->length + (PAGE_SIZE-1)) >> PAGE_SHIFT;
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vaddr = (sg->dma_address - IOUNIT_DMA_BASE) >> PAGE_SHIFT;
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IOD(("iounit_release %08lx-%08lx\n", (long)vaddr, (long)len+vaddr));
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for (len += vaddr; vaddr < len; vaddr++)
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clear_bit(vaddr, iounit->bmap);
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}
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spin_unlock_irqrestore(&iounit->lock, flags);
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}
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#ifdef CONFIG_SBUS
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static void *iounit_alloc(struct device *dev, size_t len,
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dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
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{
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long va, addr, page, end, ret;
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pgprot_t dvma_prot;
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iopte_t __iomem *iopte;
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (!len || len > 256 * 1024)
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return NULL;
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len = PAGE_ALIGN(len);
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va = __get_free_pages(gfp | __GFP_ZERO, get_order(len));
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if (!va)
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return NULL;
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addr = ret = sparc_dma_alloc_resource(dev, len);
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if (!addr)
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goto out_free_pages;
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*dma_handle = addr;
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dvma_prot = __pgprot(SRMMU_CACHE | SRMMU_ET_PTE | SRMMU_PRIV);
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end = PAGE_ALIGN((addr + len));
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while(addr < end) {
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page = va;
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{
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pgd_t *pgdp;
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pmd_t *pmdp;
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pte_t *ptep;
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long i;
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pgdp = pgd_offset(&init_mm, addr);
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pmdp = pmd_offset(pgdp, addr);
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ptep = pte_offset_map(pmdp, addr);
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set_pte(ptep, mk_pte(virt_to_page(page), dvma_prot));
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i = ((addr - IOUNIT_DMA_BASE) >> PAGE_SHIFT);
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iopte = iounit->page_table + i;
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sbus_writel(iopte_val(MKIOPTE(__pa(page))), iopte);
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}
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addr += PAGE_SIZE;
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va += PAGE_SIZE;
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}
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flush_cache_all();
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flush_tlb_all();
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return (void *)ret;
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out_free_pages:
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free_pages(va, get_order(len));
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return NULL;
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}
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static void iounit_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs)
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{
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/* XXX Somebody please fill this in */
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}
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#endif
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static const struct dma_map_ops iounit_dma_ops = {
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#ifdef CONFIG_SBUS
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.alloc = iounit_alloc,
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.free = iounit_free,
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#endif
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.map_page = iounit_map_page,
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.unmap_page = iounit_unmap_page,
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.map_sg = iounit_map_sg,
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.unmap_sg = iounit_unmap_sg,
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};
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void __init ld_mmu_iounit(void)
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{
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dma_ops = &iounit_dma_ops;
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}
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