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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f5a98bfe7b
The Allwinner SoCs have a display engine composed of several controllers assembled differently depending on the SoC, the number and type of output they have, and the additional features they provide. A number of those are supported in Linux, with the matching bindings. Now that we have the DT validation in place, let's split into separate file and convert the device tree bindings for those controllers to schemas. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20200103152801.47254-1-maxime@cerno.tech
184 lines
3.9 KiB
YAML
184 lines
3.9 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 HDMI Controller Device Tree Bindings
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description: |
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The HDMI Encoder supports the HDMI video and audio outputs, and does
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CEC. It is one end of the pipeline.
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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properties:
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compatible:
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oneOf:
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- const: allwinner,sun4i-a10-hdmi
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- const: allwinner,sun5i-a10s-hdmi
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- const: allwinner,sun6i-a31-hdmi
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- items:
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- const: allwinner,sun7i-a20-hdmi
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- const: allwinner,sun5i-a10s-hdmi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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oneOf:
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- items:
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- description: The HDMI interface clock
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- description: The HDMI module clock
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- description: The first video PLL
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- description: The second video PLL
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- items:
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- description: The HDMI interface clock
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- description: The HDMI module clock
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- description: The HDMI DDC clock
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- description: The first video PLL
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- description: The second video PLL
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clock-names:
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oneOf:
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- items:
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- const: ahb
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- const: mod
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- const: pll-0
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- const: pll-1
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- items:
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- const: ahb
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- const: mod
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- const: ddc
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- const: pll-0
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- const: pll-1
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resets:
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maxItems: 1
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dmas:
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items:
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- description: DDC Transmission DMA Channel
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- description: DDC Reception DMA Channel
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- description: Audio Transmission DMA Channel
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dma-names:
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items:
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- const: ddc-tx
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- const: ddc-rx
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- const: audio-tx
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ports:
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type: object
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description: |
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A ports node with endpoint definitions as defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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description: |
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Input endpoints of the controller.
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port@1:
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type: object
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description: |
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Output endpoints of the controller. Usually an HDMI
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connector.
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required:
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- "#address-cells"
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- "#size-cells"
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- port@0
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- port@1
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additionalProperties: false
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- dmas
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- dma-names
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if:
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properties:
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compatible:
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contains:
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const: allwinner,sun6i-a31-hdmi
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then:
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properties:
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clocks:
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minItems: 5
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clock-names:
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minItems: 5
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required:
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- resets
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/sun4i-a10-ccu.h>
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#include <dt-bindings/dma/sun4i-a10.h>
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#include <dt-bindings/reset/sun4i-a10-ccu.h>
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hdmi: hdmi@1c16000 {
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compatible = "allwinner,sun4i-a10-hdmi";
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reg = <0x01c16000 0x1000>;
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interrupts = <58>;
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clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
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<&ccu CLK_PLL_VIDEO0_2X>,
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<&ccu CLK_PLL_VIDEO1_2X>;
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clock-names = "ahb", "mod", "pll-0", "pll-1";
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dmas = <&dma SUN4I_DMA_NORMAL 16>,
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<&dma SUN4I_DMA_NORMAL 16>,
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<&dma SUN4I_DMA_DEDICATED 24>;
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dma-names = "ddc-tx", "ddc-rx", "audio-tx";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_in: port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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hdmi_in_tcon0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&tcon0_out_hdmi>;
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};
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hdmi_in_tcon1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&tcon1_out_hdmi>;
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};
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};
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hdmi_out: port@1 {
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reg = <1>;
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};
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};
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};
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...
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