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eb270e98e1
Within a DAPM sequence we normally don't care about when exactly a register write has completed so long as they happen in the order we requested. This means that we can issue most of the writes we do asynchronously which should maximise the ability of the underlying frameworks to keep the hardware busy, providing a small performance improvement on some systems. We currently ensure that all writes are completed both when changing to a different device and when calling into the regulator and clock frameworks. This should ensure that the previous ordering is maintained. We also ensure that writes are completed prior to calling into widget event functions since some event functions implement delays. This should be improved in future so that widgets can disable this sync in order to add extra writes. Signed-off-by: Mark Brown <broonie@linaro.org> |
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| aoa | ||
| arm | ||
| atmel | ||
| core | ||
| drivers | ||
| firewire | ||
| i2c | ||
| isa | ||
| mips | ||
| oss | ||
| parisc | ||
| pci | ||
| pcmcia | ||
| ppc | ||
| sh | ||
| soc | ||
| sparc | ||
| spi | ||
| synth | ||
| usb | ||
| ac97_bus.c | ||
| Kconfig | ||
| last.c | ||
| Makefile | ||
| sound_core.c | ||
| sound_firmware.c | ||