mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 17:46:47 +07:00
bcc4f4e118
Add support of stm32mp157c evaluation board (part number: STM32MP157C-EV1) split in 2 elements: -Daughter board (part number: STM32MP157C-ED1) which includes CPU, memory and power supply -Mother board (part number: STM32MP157C-EM1) which includes external peripherals (like display, camera,...) and extension connectors. The daughter board can run alone, this is why the device tree files are split in two layers, for the complete evaluation board (ev1) and for the daughter board alone (ed1). Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
186 lines
4.1 KiB
Plaintext
186 lines
4.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
|
/*
|
|
* Copyright (C) STMicroelectronics 2017 - All Rights Reserved
|
|
* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
|
|
*/
|
|
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
|
|
|
|
/ {
|
|
soc {
|
|
pinctrl: pin-controller {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "st,stm32mp157-pinctrl";
|
|
ranges = <0 0x50002000 0xa400>;
|
|
pins-are-numbered;
|
|
|
|
gpioa: gpio@50002000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x0 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOA";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 0 16>;
|
|
};
|
|
|
|
gpiob: gpio@50003000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x1000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOB";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 16 16>;
|
|
};
|
|
|
|
gpioc: gpio@50004000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x2000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOC";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 32 16>;
|
|
};
|
|
|
|
gpiod: gpio@50005000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x3000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOD";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 48 16>;
|
|
};
|
|
|
|
gpioe: gpio@50006000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x4000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOE";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 64 16>;
|
|
};
|
|
|
|
gpiof: gpio@50007000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x5000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOF";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 80 16>;
|
|
};
|
|
|
|
gpiog: gpio@50008000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x6000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOG";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 96 16>;
|
|
};
|
|
|
|
gpioh: gpio@50009000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x7000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOH";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 112 16>;
|
|
};
|
|
|
|
gpioi: gpio@5000a000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x8000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOI";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 128 16>;
|
|
};
|
|
|
|
gpioj: gpio@5000b000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0x9000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOJ";
|
|
ngpios = <16>;
|
|
gpio-ranges = <&pinctrl 0 144 16>;
|
|
};
|
|
|
|
gpiok: gpio@5000c000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0xa000 0x400>;
|
|
clocks = <&clk_pll3_p>;
|
|
st,bank-name = "GPIOK";
|
|
ngpios = <8>;
|
|
gpio-ranges = <&pinctrl 0 160 8>;
|
|
};
|
|
|
|
uart4_pins_a: uart4@0 {
|
|
pins1 {
|
|
pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
|
|
bias-disable;
|
|
drive-push-pull;
|
|
slew-rate = <0>;
|
|
};
|
|
pins2 {
|
|
pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
pinctrl_z: pin-controller-z {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "st,stm32mp157-z-pinctrl";
|
|
ranges = <0 0x54004000 0x400>;
|
|
pins-are-numbered;
|
|
status = "disabled";
|
|
|
|
gpioz: gpio@54004000 {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
reg = <0 0x400>;
|
|
clocks = <&clk_pll2_p>;
|
|
st,bank-name = "GPIOZ";
|
|
st,bank-ioport = <11>;
|
|
ngpios = <8>;
|
|
gpio-ranges = <&pinctrl_z 0 400 8>;
|
|
};
|
|
};
|
|
};
|
|
};
|