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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7b4dc3c0da
Looking at our virtual PCI device, we can see surprising Region 4 and Region 5.
00:10.0 VGA compatible controller: Intel Corporation Sky Lake Integrated Graphics (rev 06) (prog-if 00 [VGA controller])
....
Region 0: Memory at 140000000 (64-bit, non-prefetchable) [size=16M]
Region 2: Memory at 180000000 (64-bit, prefetchable) [size=1G]
Region 4: Memory at <ignored> (32-bit, non-prefetchable)
Region 5: Memory at <ignored> (32-bit, non-prefetchable)
Expansion ROM at febd6000 [disabled] [size=2K]
The fact is that we only implemented BAR0 and BAR2. Surprising Region 4 and
Region 5 are shown because we report their size as 0xffffffff. They should
report size 0 instead.
BTW, the physical GPU has a PIO BAR. GVTg hasn't implemented PIO access, so
we ignored this BAR for vGPU device.
v2: fix BAR size value calculation.
Link: https://bugzilla.redhat.com/show_bug.cgi?id=1458032
Signed-off-by: Changbin Du <changbin.du@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
(cherry picked from commit
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|---|---|---|
| .. | ||
| aperture_gm.c | ||
| cfg_space.c | ||
| cmd_parser.c | ||
| cmd_parser.h | ||
| debug.h | ||
| display.c | ||
| display.h | ||
| edid.c | ||
| edid.h | ||
| execlist.c | ||
| execlist.h | ||
| firmware.c | ||
| gtt.c | ||
| gtt.h | ||
| gvt.c | ||
| gvt.h | ||
| handlers.c | ||
| hypercall.h | ||
| interrupt.c | ||
| interrupt.h | ||
| kvmgt.c | ||
| Makefile | ||
| mmio.c | ||
| mmio.h | ||
| mpt.h | ||
| opregion.c | ||
| reg.h | ||
| render.c | ||
| render.h | ||
| sched_policy.c | ||
| sched_policy.h | ||
| scheduler.c | ||
| scheduler.h | ||
| trace_points.c | ||
| trace.h | ||
| vgpu.c | ||