mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 14:36:40 +07:00
df34403dca
This adds the core 8xx stuff and specifically mpc885ads board-specific bits to arch/powerpc. Respective Kconfig has been cleaned up from the stuff not yet ported over to avoid confusion. Updated and cleaned version. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
186 lines
3.9 KiB
Plaintext
186 lines
3.9 KiB
Plaintext
/*
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* MPC885 ADS Device Tree Source
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*
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* Copyright 2006 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/ {
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model = "MPC885ADS";
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compatible = "mpc8xx";
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#address-cells = <1>;
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#size-cells = <1>;
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linux,phandle = <100>;
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cpus {
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#cpus = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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linux,phandle = <200>;
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PowerPC,885@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <2000>; // L1, 8K
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i-cache-size = <2000>; // L1, 8K
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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32-bit;
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interrupts = <f 2>; // decrementer interrupt
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interrupt-parent = <ff000000>;
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linux,phandle = <201>;
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linux,boot-cpu;
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};
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};
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memory {
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device_type = "memory";
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linux,phandle = <300>;
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reg = <00000000 800000>;
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};
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soc885@ff000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "soc";
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ranges = <0 ff000000 00100000>;
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reg = <ff000000 00000200>;
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bus-frequency = <0>;
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mdio@e80 {
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device_type = "mdio";
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compatible = "fs_enet";
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reg = <e80 8>;
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linux,phandle = <e80>;
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-phy@0 {
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linux,phandle = <e8000>;
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reg = <0>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@1 {
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linux,phandle = <e8001>;
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reg = <1>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@2 {
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linux,phandle = <e8002>;
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reg = <2>;
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device_type = "ethernet-phy";
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};
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};
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fec@e00 {
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device_type = "network";
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compatible = "fs_enet";
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model = "FEC";
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device-id = <1>;
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reg = <e00 188>;
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mac-address = [ 00 00 0C 00 01 FD ];
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interrupts = <3 1>;
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interrupt-parent = <ff000000>;
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phy-handle = <e8000>;
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};
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fec@1e00 {
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device_type = "network";
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compatible = "fs_enet";
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model = "FEC";
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device-id = <2>;
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reg = <1e00 188>;
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mac-address = [ 00 00 0C 00 02 FD ];
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interrupts = <7 1>;
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interrupt-parent = <ff000000>;
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phy-handle = <e8001>;
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};
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pic@ff000000 {
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linux,phandle = <ff000000>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <0 24>;
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built-in;
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device_type = "mpc8xx-pic";
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compatible = "CPM";
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};
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cpm@ff000000 {
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linux,phandle = <ff000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "cpm";
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model = "CPM";
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ranges = <0 0 4000>;
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reg = <860 f0>;
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command-proc = <9c0>;
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brg-frequency = <0>;
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interrupts = <0 2>; // cpm error interrupt
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interrupt-parent = <930>;
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pic@930 {
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linux,phandle = <930>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <5 2 0 2>;
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interrupt-parent = <ff000000>;
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reg = <930 20>;
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built-in;
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device_type = "cpm-pic";
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compatible = "CPM";
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};
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smc@a80 {
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device_type = "serial";
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compatible = "cpm_uart";
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model = "SMC";
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device-id = <1>;
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reg = <a80 10 3e80 40>;
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clock-setup = <00ffffff 0>;
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rx-clock = <1>;
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tx-clock = <1>;
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current-speed = <0>;
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interrupts = <4 3>;
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interrupt-parent = <930>;
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};
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smc@a90 {
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device_type = "serial";
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compatible = "cpm_uart";
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model = "SMC";
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device-id = <2>;
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reg = <a90 20 3f80 40>;
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clock-setup = <ff00ffff 90000>;
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rx-clock = <2>;
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tx-clock = <2>;
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current-speed = <0>;
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interrupts = <3 3>;
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interrupt-parent = <930>;
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};
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scc@a40 {
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device_type = "network";
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compatible = "fs_enet";
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model = "SCC";
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device-id = <3>;
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reg = <a40 18 3e00 80>;
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mac-address = [ 00 00 0C 00 03 FD ];
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interrupts = <1c 3>;
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interrupt-parent = <930>;
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phy-handle = <e8002>;
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};
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};
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};
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};
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