Will Deacon 342e53bd85 arm64: perf: Add support for Armv8.1 PMCEID register format ... Armv8.1 allocated the upper 32-bits of the PMCEID registers to describe the common architectural and microarchitecture events beginning at 0x4000. Add support for these registers to our probing code, so that we can advertise the SPE events when they are supported by the CPU. Signed-off-by: Will Deacon <will.deacon@arm.com>		2018-11-21 13:16:33 +00:00
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arm_pmu.h	arm64: perf: Add support for Armv8.1 PMCEID register format	2018-11-21 13:16:33 +00:00