mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 20:48:08 +07:00
11be8af70d
Include Cadence core DT schema and define the Cadence platform DT schema for both Host and Endpoint mode. Note: The Cadence core DT schema could be included for other platforms using Cadence PCIe core. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
77 lines
1.8 KiB
YAML
77 lines
1.8 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-host.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Cadence PCIe host controller
|
|
|
|
maintainers:
|
|
- Tom Joseph <tjoseph@cadence.com>
|
|
|
|
allOf:
|
|
- $ref: /schemas/pci/pci-bus.yaml#
|
|
- $ref: "cdns-pcie-host.yaml#"
|
|
|
|
properties:
|
|
compatible:
|
|
const: cdns,cdns-pcie-host
|
|
|
|
reg:
|
|
maxItems: 3
|
|
|
|
reg-names:
|
|
items:
|
|
- const: reg
|
|
- const: cfg
|
|
- const: mem
|
|
|
|
msi-parent: true
|
|
|
|
required:
|
|
- reg
|
|
- reg-names
|
|
|
|
examples:
|
|
- |
|
|
bus {
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
|
|
pcie@fb000000 {
|
|
compatible = "cdns,cdns-pcie-host";
|
|
device_type = "pci";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
bus-range = <0x0 0xff>;
|
|
linux,pci-domain = <0>;
|
|
cdns,max-outbound-regions = <16>;
|
|
cdns,no-bar-match-nbits = <32>;
|
|
vendor-id = <0x17cd>;
|
|
device-id = <0x0200>;
|
|
|
|
reg = <0x0 0xfb000000 0x0 0x01000000>,
|
|
<0x0 0x41000000 0x0 0x00001000>,
|
|
<0x0 0x40000000 0x0 0x04000000>;
|
|
reg-names = "reg", "cfg", "mem";
|
|
|
|
ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
|
|
<0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
|
|
|
|
#interrupt-cells = <0x1>;
|
|
|
|
interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 14 0x1>,
|
|
<0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 15 0x1>,
|
|
<0x0 0x0 0x0 0x3 &gic 0x0 0x0 0x0 16 0x1>,
|
|
<0x0 0x0 0x0 0x4 &gic 0x0 0x0 0x0 17 0x1>;
|
|
|
|
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
|
|
|
msi-parent = <&its_pci>;
|
|
|
|
phys = <&pcie_phy0>;
|
|
phy-names = "pcie-phy";
|
|
};
|
|
};
|
|
...
|