mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 13:36:45 +07:00
616 lines
12 KiB
C
616 lines
12 KiB
C
/*
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* Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
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*
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* Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
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* Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
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*
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* FIXME: Need to port to DVB v5.2 API
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <asm/div64.h>
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#include "dvb_frontend.h"
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#include "mb86a20s.h"
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static int debug = 1;
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
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#define rc(args...) do { \
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printk(KERN_ERR "mb86a20s: " args); \
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} while (0)
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#define dprintk(args...) \
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do { \
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if (debug) { \
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printk(KERN_DEBUG "mb86a20s: %s: ", __func__); \
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printk(args); \
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} \
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} while (0)
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struct mb86a20s_state {
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struct i2c_adapter *i2c;
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const struct mb86a20s_config *config;
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struct dvb_frontend frontend;
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};
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struct regdata {
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u8 reg;
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u8 data;
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};
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/*
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* Initialization sequence: Use whatevere default values that PV SBTVD
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* does on its initialisation, obtained via USB snoop
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*/
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static struct regdata mb86a20s_init[] = {
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{ 0x70, 0x0f },
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{ 0x70, 0xff },
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{ 0x08, 0x01 },
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{ 0x09, 0x3e },
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{ 0x50, 0xd1 },
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{ 0x51, 0x22 },
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{ 0x39, 0x01 },
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{ 0x71, 0x00 },
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{ 0x28, 0x2a },
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{ 0x29, 0x00 },
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{ 0x2a, 0xff },
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{ 0x2b, 0x80 },
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{ 0x28, 0x20 },
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{ 0x29, 0x33 },
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{ 0x2a, 0xdf },
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{ 0x2b, 0xa9 },
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{ 0x3b, 0x21 },
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{ 0x3c, 0x3a },
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{ 0x01, 0x0d },
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{ 0x04, 0x08 },
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{ 0x05, 0x05 },
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{ 0x04, 0x0e },
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{ 0x05, 0x00 },
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{ 0x04, 0x0f },
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{ 0x05, 0x14 },
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{ 0x04, 0x0b },
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{ 0x05, 0x8c },
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{ 0x04, 0x00 },
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{ 0x05, 0x00 },
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{ 0x04, 0x01 },
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{ 0x05, 0x07 },
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{ 0x04, 0x02 },
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{ 0x05, 0x0f },
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{ 0x04, 0x03 },
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{ 0x05, 0xa0 },
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{ 0x04, 0x09 },
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{ 0x05, 0x00 },
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{ 0x04, 0x0a },
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{ 0x05, 0xff },
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{ 0x04, 0x27 },
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{ 0x05, 0x64 },
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{ 0x04, 0x28 },
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{ 0x05, 0x00 },
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{ 0x04, 0x1e },
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{ 0x05, 0xff },
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{ 0x04, 0x29 },
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{ 0x05, 0x0a },
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{ 0x04, 0x32 },
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{ 0x05, 0x0a },
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{ 0x04, 0x14 },
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{ 0x05, 0x02 },
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{ 0x04, 0x04 },
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{ 0x05, 0x00 },
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{ 0x04, 0x05 },
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{ 0x05, 0x22 },
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{ 0x04, 0x06 },
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{ 0x05, 0x0e },
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{ 0x04, 0x07 },
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{ 0x05, 0xd8 },
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{ 0x04, 0x12 },
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{ 0x05, 0x00 },
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{ 0x04, 0x13 },
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{ 0x05, 0xff },
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{ 0x52, 0x01 },
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{ 0x50, 0xa7 },
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{ 0x51, 0x00 },
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{ 0x50, 0xa8 },
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{ 0x51, 0xff },
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{ 0x50, 0xa9 },
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{ 0x51, 0xff },
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{ 0x50, 0xaa },
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{ 0x51, 0x00 },
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{ 0x50, 0xab },
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{ 0x51, 0xff },
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{ 0x50, 0xac },
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{ 0x51, 0xff },
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{ 0x50, 0xad },
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{ 0x51, 0x00 },
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{ 0x50, 0xae },
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{ 0x51, 0xff },
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{ 0x50, 0xaf },
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{ 0x51, 0xff },
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{ 0x5e, 0x07 },
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{ 0x50, 0xdc },
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{ 0x51, 0x01 },
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{ 0x50, 0xdd },
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{ 0x51, 0xf4 },
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{ 0x50, 0xde },
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{ 0x51, 0x01 },
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{ 0x50, 0xdf },
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{ 0x51, 0xf4 },
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{ 0x50, 0xe0 },
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{ 0x51, 0x01 },
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{ 0x50, 0xe1 },
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{ 0x51, 0xf4 },
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{ 0x50, 0xb0 },
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{ 0x51, 0x07 },
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{ 0x50, 0xb2 },
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{ 0x51, 0xff },
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{ 0x50, 0xb3 },
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{ 0x51, 0xff },
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{ 0x50, 0xb4 },
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{ 0x51, 0xff },
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{ 0x50, 0xb5 },
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{ 0x51, 0xff },
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{ 0x50, 0xb6 },
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{ 0x51, 0xff },
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{ 0x50, 0xb7 },
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{ 0x51, 0xff },
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{ 0x50, 0x50 },
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{ 0x51, 0x02 },
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{ 0x50, 0x51 },
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{ 0x51, 0x04 },
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{ 0x45, 0x04 },
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{ 0x48, 0x04 },
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{ 0x50, 0xd5 },
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{ 0x51, 0x01 }, /* Serial */
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{ 0x50, 0xd6 },
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{ 0x51, 0x1f },
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{ 0x50, 0xd2 },
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{ 0x51, 0x03 },
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{ 0x50, 0xd7 },
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{ 0x51, 0x3f },
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{ 0x1c, 0x01 },
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{ 0x28, 0x06 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x03 },
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{ 0x28, 0x07 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x0d },
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{ 0x28, 0x08 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x02 },
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{ 0x28, 0x09 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x01 },
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{ 0x28, 0x0a },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x21 },
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{ 0x28, 0x0b },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x29 },
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{ 0x28, 0x0c },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x16 },
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{ 0x28, 0x0d },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x31 },
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{ 0x28, 0x0e },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x0e },
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{ 0x28, 0x0f },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x4e },
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{ 0x28, 0x10 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x46 },
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{ 0x28, 0x11 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x0f },
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{ 0x28, 0x12 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x56 },
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{ 0x28, 0x13 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x35 },
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{ 0x28, 0x14 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x01 },
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{ 0x2b, 0xbe },
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{ 0x28, 0x15 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x01 },
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{ 0x2b, 0x84 },
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{ 0x28, 0x16 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x03 },
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{ 0x2b, 0xee },
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{ 0x28, 0x17 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x98 },
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{ 0x28, 0x18 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x00 },
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{ 0x2b, 0x9f },
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{ 0x28, 0x19 },
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{ 0x29, 0x00 },
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{ 0x2a, 0x07 },
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{ 0x2b, 0xb2 },
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{ 0x28, 0x1a },
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{ 0x29, 0x00 },
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{ 0x2a, 0x06 },
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{ 0x2b, 0xc2 },
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{ 0x28, 0x1b },
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{ 0x29, 0x00 },
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{ 0x2a, 0x07 },
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{ 0x2b, 0x4a },
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{ 0x28, 0x1c },
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{ 0x29, 0x00 },
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{ 0x2a, 0x01 },
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{ 0x2b, 0xbc },
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{ 0x28, 0x1d },
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{ 0x29, 0x00 },
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{ 0x2a, 0x04 },
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{ 0x2b, 0xba },
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{ 0x28, 0x1e },
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{ 0x29, 0x00 },
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{ 0x2a, 0x06 },
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{ 0x2b, 0x14 },
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{ 0x50, 0x1e },
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{ 0x51, 0x5d },
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{ 0x50, 0x22 },
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{ 0x51, 0x00 },
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{ 0x50, 0x23 },
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{ 0x51, 0xc8 },
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{ 0x50, 0x24 },
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{ 0x51, 0x00 },
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{ 0x50, 0x25 },
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{ 0x51, 0xf0 },
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{ 0x50, 0x26 },
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{ 0x51, 0x00 },
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{ 0x50, 0x27 },
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{ 0x51, 0xc3 },
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{ 0x50, 0x39 },
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{ 0x51, 0x02 },
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{ 0x50, 0xd5 },
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{ 0x51, 0x01 },
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{ 0xd0, 0x00 },
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};
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static struct regdata mb86a20s_reset_reception[] = {
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{ 0x70, 0xf0 },
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{ 0x70, 0xff },
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{ 0x08, 0x01 },
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{ 0x08, 0x00 },
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};
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static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
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u8 i2c_addr, int reg, int data)
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{
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u8 buf[] = { reg, data };
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struct i2c_msg msg = {
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.addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
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};
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int rc;
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rc = i2c_transfer(state->i2c, &msg, 1);
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if (rc != 1) {
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printk("%s: writereg rcor(rc == %i, reg == 0x%02x,"
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" data == 0x%02x)\n", __func__, rc, reg, data);
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return rc;
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}
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return 0;
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}
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static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
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u8 i2c_addr, struct regdata *rd, int size)
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{
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int i, rc;
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for (i = 0; i < size; i++) {
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rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
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rd[i].data);
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if (rc < 0)
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return rc;
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}
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return 0;
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}
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static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
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u8 i2c_addr, u8 reg)
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{
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u8 val;
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int rc;
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struct i2c_msg msg[] = {
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{ .addr = i2c_addr, .flags = 0, .buf = ®, .len = 1 },
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{ .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
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};
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rc = i2c_transfer(state->i2c, msg, 2);
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if (rc != 2) {
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rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc);
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return rc;
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}
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return val;
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}
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#define mb86a20s_readreg(state, reg) \
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mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
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#define mb86a20s_writereg(state, reg, val) \
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mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
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#define mb86a20s_writeregdata(state, regdata) \
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mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
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regdata, ARRAY_SIZE(regdata))
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static int mb86a20s_initfe(struct dvb_frontend *fe)
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{
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struct mb86a20s_state *state = fe->demodulator_priv;
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int rc;
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u8 regD5 = 1;
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dprintk("\n");
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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/* Initialize the frontend */
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rc = mb86a20s_writeregdata(state, mb86a20s_init);
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if (rc < 0)
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return rc;
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if (!state->config->is_serial) {
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regD5 &= ~1;
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rc = mb86a20s_writereg(state, 0x50, 0xd5);
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if (rc < 0)
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return rc;
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rc = mb86a20s_writereg(state, 0x51, regD5);
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if (rc < 0)
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return rc;
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}
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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return 0;
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}
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static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
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{
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struct mb86a20s_state *state = fe->demodulator_priv;
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unsigned rf_max, rf_min, rf;
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u8 val;
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dprintk("\n");
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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/* Does a binary search to get RF strength */
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rf_max = 0xfff;
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rf_min = 0;
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do {
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rf = (rf_max + rf_min) / 2;
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mb86a20s_writereg(state, 0x04, 0x1f);
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mb86a20s_writereg(state, 0x05, rf >> 8);
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mb86a20s_writereg(state, 0x04, 0x20);
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mb86a20s_writereg(state, 0x04, rf);
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val = mb86a20s_readreg(state, 0x02);
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if (val & 0x08)
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rf_min = (rf_max + rf_min) / 2;
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else
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rf_max = (rf_max + rf_min) / 2;
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if (rf_max - rf_min < 4) {
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*strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
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break;
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}
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} while (1);
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dprintk("signal strength = %d\n", *strength);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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return 0;
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}
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static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
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{
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struct mb86a20s_state *state = fe->demodulator_priv;
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u8 val;
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dprintk("\n");
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*status = 0;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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val = mb86a20s_readreg(state, 0x0a) & 0xf;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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if (val >= 2)
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*status |= FE_HAS_SIGNAL;
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if (val >= 4)
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*status |= FE_HAS_CARRIER;
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if (val >= 5)
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*status |= FE_HAS_VITERBI;
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if (val >= 7)
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*status |= FE_HAS_SYNC;
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if (val >= 8) /* Maybe 9? */
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*status |= FE_HAS_LOCK;
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dprintk("val = %d, status = 0x%02x\n", val, *status);
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return 0;
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}
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static int mb86a20s_set_frontend(struct dvb_frontend *fe,
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struct dvb_frontend_parameters *p)
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{
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struct mb86a20s_state *state = fe->demodulator_priv;
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int rc;
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dprintk("\n");
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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fe->ops.tuner_ops.set_params(fe, p);
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
fe->ops.i2c_gate_ctrl(fe, 0);
|
|
rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
fe->ops.i2c_gate_ctrl(fe, 1);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int mb86a20s_get_frontend(struct dvb_frontend *fe,
|
|
struct dvb_frontend_parameters *p)
|
|
{
|
|
|
|
/* FIXME: For now, it does nothing */
|
|
|
|
fe->dtv_property_cache.bandwidth_hz = 6000000;
|
|
fe->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO;
|
|
fe->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO;
|
|
fe->dtv_property_cache.isdbt_partial_reception = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mb86a20s_tune(struct dvb_frontend *fe,
|
|
struct dvb_frontend_parameters *params,
|
|
unsigned int mode_flags,
|
|
unsigned int *delay,
|
|
fe_status_t *status)
|
|
{
|
|
int rc = 0;
|
|
|
|
dprintk("\n");
|
|
|
|
if (params != NULL)
|
|
rc = mb86a20s_set_frontend(fe, params);
|
|
|
|
if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
|
|
mb86a20s_read_status(fe, status);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static void mb86a20s_release(struct dvb_frontend *fe)
|
|
{
|
|
struct mb86a20s_state *state = fe->demodulator_priv;
|
|
|
|
dprintk("\n");
|
|
|
|
kfree(state);
|
|
}
|
|
|
|
static struct dvb_frontend_ops mb86a20s_ops;
|
|
|
|
struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
|
|
struct i2c_adapter *i2c)
|
|
{
|
|
u8 rev;
|
|
|
|
/* allocate memory for the internal state */
|
|
struct mb86a20s_state *state =
|
|
kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
|
|
|
|
dprintk("\n");
|
|
if (state == NULL) {
|
|
rc("Unable to kzalloc\n");
|
|
goto error;
|
|
}
|
|
|
|
/* setup the state */
|
|
state->config = config;
|
|
state->i2c = i2c;
|
|
|
|
/* create dvb_frontend */
|
|
memcpy(&state->frontend.ops, &mb86a20s_ops,
|
|
sizeof(struct dvb_frontend_ops));
|
|
state->frontend.demodulator_priv = state;
|
|
|
|
/* Check if it is a mb86a20s frontend */
|
|
rev = mb86a20s_readreg(state, 0);
|
|
|
|
if (rev == 0x13) {
|
|
printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
|
|
} else {
|
|
printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
|
|
rev);
|
|
goto error;
|
|
}
|
|
|
|
return &state->frontend;
|
|
|
|
error:
|
|
kfree(state);
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL(mb86a20s_attach);
|
|
|
|
static struct dvb_frontend_ops mb86a20s_ops = {
|
|
/* Use dib8000 values per default */
|
|
.info = {
|
|
.name = "Fujitsu mb86A20s",
|
|
.type = FE_OFDM,
|
|
.caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
|
|
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
|
|
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
|
|
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
|
|
FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
|
|
FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO,
|
|
/* Actually, those values depend on the used tuner */
|
|
.frequency_min = 45000000,
|
|
.frequency_max = 864000000,
|
|
.frequency_stepsize = 62500,
|
|
},
|
|
|
|
.release = mb86a20s_release,
|
|
|
|
.init = mb86a20s_initfe,
|
|
.set_frontend = mb86a20s_set_frontend,
|
|
.get_frontend = mb86a20s_get_frontend,
|
|
.read_status = mb86a20s_read_status,
|
|
.read_signal_strength = mb86a20s_read_signal_strength,
|
|
.tune = mb86a20s_tune,
|
|
};
|
|
|
|
MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
|
|
MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
|
|
MODULE_LICENSE("GPL");
|