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5e89c55e4e
The SBBR and ACPI specifications allow ACPI based systems that do not implement PSCI (eg systems with no EL3) to boot through the ACPI parking protocol specification[1]. This patch implements the ACPI parking protocol CPU operations, and adds code that eases parsing the parking protocol data structures to the ARM64 SMP initializion carried out at the same time as cpus enumeration. To wake-up the CPUs from the parked state, this patch implements a wakeup IPI for ARM64 (ie arch_send_wakeup_ipi_mask()) that mirrors the ARM one, so that a specific IPI is sent for wake-up purpose in order to distinguish it from other IPI sources. Given the current ACPI MADT parsing API, the patch implements a glue layer that helps passing MADT GICC data structure from SMP initialization code to the parking protocol implementation somewhat overriding the CPU operations interfaces. This to avoid creating a completely trasparent DT/ACPI CPU operations layer that would require creating opaque structure handling for CPUs data (DT represents CPU through DT nodes, ACPI through static MADT table entries), which seems overkill given that ACPI on ARM64 mandates only two booting protocols (PSCI and parking protocol), so there is no need for further protocol additions. Based on the original work by Mark Salter <msalter@redhat.com> [1] https://acpica.org/sites/acpica/files/MP%20Startup%20for%20ARM%20platforms.docx Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Loc Ho <lho@apm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mark Salter <msalter@redhat.com> Cc: Al Stone <ahs3@redhat.com> [catalin.marinas@arm.com: Added WARN_ONCE(!acpi_parking_protocol_valid() on the IPI] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/thread_info.h>
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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struct seq_file;
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/*
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* generate IPI list text
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*/
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extern void show_ipi_list(struct seq_file *p, int prec);
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/*
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* Called from C code, this handles an IPI.
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*/
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extern void handle_IPI(int ipinr, struct pt_regs *regs);
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/*
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* Discover the set of possible CPUs and determine their
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* SMP operations.
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*/
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extern void smp_init_cpus(void);
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/*
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* Provide a function to raise an IPI cross call on CPUs in callmap.
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*/
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extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
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extern void (*__smp_cross_call)(const struct cpumask *, unsigned int);
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/*
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* Called from the secondary holding pen, this is the secondary CPU entry point.
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*/
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asmlinkage void secondary_start_kernel(void);
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/*
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* Initial data for bringing up a secondary CPU.
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*/
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struct secondary_data {
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void *stack;
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};
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extern struct secondary_data secondary_data;
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extern void secondary_entry(void);
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
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extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask);
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#else
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static inline void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
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{
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BUILD_BUG();
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}
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#endif
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern void cpu_die(void);
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#endif /* ifndef __ASM_SMP_H */
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