linux_dsm_epyc7002/include/linux/irqchip
Haojian Zhuang b8802f76fe irqchip: gic: Use mask field in GICC_IAR
Bit[9:0] is interrupt ID field in GICC_IAR. Bit[12:10] is CPU ID field,
and others are reserved.

So we should use GICC_IAR_INT_ID_MASK to get interrupt ID. It's not a good way
to use ~0x1c00 (CPU ID field) to get interrupt ID.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Link: https://lkml.kernel.org/r/1399795571-17231-3-git-send-email-haojian.zhuang@linaro.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-19 00:35:23 +00:00
..
arm-gic.h irqchip: gic: Use mask field in GICC_IAR 2014-05-19 00:35:23 +00:00
arm-vic.h irqchip: support cascaded VICs 2014-02-13 11:21:21 +01:00
chained_irq.h arm: Move chained_irq_(enter|exit) to a generic file 2013-03-26 16:11:43 +00:00
irq-crossbar.h DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP 2014-02-05 20:08:34 +05:30
metag-ext.h metag: Internal and external irqchips 2013-03-02 20:09:48 +00:00
metag.h metag: Internal and external irqchips 2013-03-02 20:09:48 +00:00
mmp.h ARM: mmp: avoid to include head file in mach-mmp 2013-08-24 17:44:45 +08:00
mxs.h ARM: mxs: move icoll driver into drivers/irqchip 2013-04-01 16:30:04 +08:00
spear-shirq.h ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/ 2012-11-26 16:55:33 +05:30
versatile-fpga.h
xtensa-mx.h xtensa: add MX irqchip 2014-01-14 10:19:58 -08:00
xtensa-pic.h xtensa: move built-in PIC to drivers/irqchip 2014-01-14 10:19:56 -08:00