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The number of TX and RX queues allocated depends on the device type, the current features set, online CPUs, and various compile flags. To enable DCB with multiple queues and allow it to coexist with all the features currently implemented it has to setup a valid queue count. This is done at init time using the FDIR and RSS max queue counts and allowing each TC to allocate a queue per CPU. DCB will now use available queues up to (8 x TCs) this is somewhat arbitrary cap but allows DCB to use up to 64 queues. Its easy to increase this later if that is needed. This is prep work to enable Flow Director with DCB. After this DCB can easily coexist with existing features and no longer needs its own DCB feature ring. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
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| .. | ||
| ixgbe_82598.c | ||
| ixgbe_82599.c | ||
| ixgbe_common.c | ||
| ixgbe_common.h | ||
| ixgbe_dcb_82598.c | ||
| ixgbe_dcb_82598.h | ||
| ixgbe_dcb_82599.c | ||
| ixgbe_dcb_82599.h | ||
| ixgbe_dcb_nl.c | ||
| ixgbe_dcb.c | ||
| ixgbe_dcb.h | ||
| ixgbe_ethtool.c | ||
| ixgbe_fcoe.c | ||
| ixgbe_fcoe.h | ||
| ixgbe_main.c | ||
| ixgbe_mbx.c | ||
| ixgbe_mbx.h | ||
| ixgbe_phy.c | ||
| ixgbe_phy.h | ||
| ixgbe_sriov.c | ||
| ixgbe_sriov.h | ||
| ixgbe_type.h | ||
| ixgbe_x540.c | ||
| ixgbe.h | ||
| Makefile | ||