mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 15:26:41 +07:00
09ea33e5c6
The new hardware design applied for this cards. Silicon Labs C8051F300 microcontroller is used for LNB power control. It connected to cx23885 GPIO pins: GPIO0 - P0.3 data GPIO1 - P0.2 reset GPIO2 - P0.1 clk GPIO3 - P0.0 busy Tevii S470 based on Montage Technology M88TS2020 digital satellite tuner and M88DS3000 advanced DVB-S/S2 demodulator. Signed-off-by: Igor M. Liplianin <liplianin@me.by> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
178 lines
4.1 KiB
C
178 lines
4.1 KiB
C
/*
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* Driver for Silicon Labs C8051F300 microcontroller.
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*
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* It is used for LNB power control in TeVii S470,
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* TBS 6920 PCIe DVB-S2 cards.
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*
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* Microcontroller connected to cx23885 GPIO pins:
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* GPIO0 - data - P0.3 F300
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* GPIO1 - reset - P0.2 F300
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* GPIO2 - clk - P0.1 F300
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* GPIO3 - busy - P0.0 F300
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*
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* Copyright (C) 2009 Igor M. Liplianin <liplianin@me.by>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "cx23885.h"
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#define F300_DATA GPIO_0
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#define F300_RESET GPIO_1
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#define F300_CLK GPIO_2
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#define F300_BUSY GPIO_3
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static void f300_set_line(struct cx23885_dev *dev, u32 line, u8 lvl)
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{
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cx23885_gpio_enable(dev, line, 1);
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if (lvl == 1)
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cx23885_gpio_set(dev, line);
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else
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cx23885_gpio_clear(dev, line);
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}
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static u8 f300_get_line(struct cx23885_dev *dev, u32 line)
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{
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cx23885_gpio_enable(dev, line, 0);
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return cx23885_gpio_get(dev, line);
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}
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static void f300_send_byte(struct cx23885_dev *dev, u8 dta)
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{
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u8 i;
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for (i = 0; i < 8; i++) {
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f300_set_line(dev, F300_CLK, 0);
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udelay(30);
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f300_set_line(dev, F300_DATA, (dta & 0x80) >> 7);/* msb first */
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udelay(30);
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dta <<= 1;
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f300_set_line(dev, F300_CLK, 1);
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udelay(30);
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}
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}
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static u8 f300_get_byte(struct cx23885_dev *dev)
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{
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u8 i, dta = 0;
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for (i = 0; i < 8; i++) {
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f300_set_line(dev, F300_CLK, 0);
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udelay(30);
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dta <<= 1;
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f300_set_line(dev, F300_CLK, 1);
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udelay(30);
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dta |= f300_get_line(dev, F300_DATA);/* msb first */
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}
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return dta;
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}
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static u8 f300_xfer(struct dvb_frontend *fe, u8 *buf)
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{
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struct cx23885_tsport *port = fe->dvb->priv;
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struct cx23885_dev *dev = port->dev;
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u8 i, temp, ret = 0;
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temp = buf[0];
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for (i = 0; i < buf[0]; i++)
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temp += buf[i + 1];
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temp = (~temp + 1);/* get check sum */
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buf[1 + buf[0]] = temp;
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f300_set_line(dev, F300_RESET, 1);
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f300_set_line(dev, F300_CLK, 1);
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udelay(30);
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f300_set_line(dev, F300_DATA, 1);
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msleep(1);
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/* question: */
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f300_set_line(dev, F300_RESET, 0);/* begin to send data */
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msleep(1);
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f300_send_byte(dev, 0xe0);/* the slave address is 0xe0, write */
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msleep(1);
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temp = buf[0];
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temp += 2;
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for (i = 0; i < temp; i++)
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f300_send_byte(dev, buf[i]);
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f300_set_line(dev, F300_RESET, 1);/* sent data over */
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f300_set_line(dev, F300_DATA, 1);
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/* answer: */
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temp = 0;
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for (i = 0; ((i < 8) & (temp == 0)); i++) {
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msleep(1);
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if (f300_get_line(dev, F300_BUSY) == 0)
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temp = 1;
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}
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if (i > 7) {
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printk(KERN_ERR "%s: timeout, the slave no response\n",
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__func__);
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ret = 1; /* timeout, the slave no response */
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} else { /* the slave not busy, prepare for getting data */
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f300_set_line(dev, F300_RESET, 0);/*ready...*/
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msleep(1);
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f300_send_byte(dev, 0xe1);/* 0xe1 is Read */
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msleep(1);
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temp = f300_get_byte(dev);/*get the data length */
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if (temp > 14)
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temp = 14;
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for (i = 0; i < (temp + 1); i++)
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f300_get_byte(dev);/* get data to empty buffer */
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f300_set_line(dev, F300_RESET, 1);/* received data over */
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f300_set_line(dev, F300_DATA, 1);
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}
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return ret;
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}
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int f300_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
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{
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u8 buf[16];
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buf[0] = 0x05;
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buf[1] = 0x38;/* write port */
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buf[2] = 0x01;/* A port, lnb power */
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switch (voltage) {
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case SEC_VOLTAGE_13:
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buf[3] = 0x01;/* power on */
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buf[4] = 0x02;/* B port, H/V */
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buf[5] = 0x00;/*13V v*/
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break;
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case SEC_VOLTAGE_18:
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buf[3] = 0x01;
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buf[4] = 0x02;
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buf[5] = 0x01;/* 18V h*/
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break;
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case SEC_VOLTAGE_OFF:
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buf[3] = 0x00;/* power off */
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buf[4] = 0x00;
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buf[5] = 0x00;
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break;
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}
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return f300_xfer(fe, buf);
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}
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