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Portals are memory mapped interfaces to BMan that allow low-latency, lock-less interaction by software running on processor cores, accelerators and network interfaces with the BMan Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95 Signed-off-by: Scott Wood <scottwood@freescale.com>
57 lines
1.4 KiB
Plaintext
57 lines
1.4 KiB
Plaintext
QorIQ DPAA Buffer Manager Portals Device Tree Binding
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Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
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CONTENTS
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- BMan Portal
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- Example
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BMan Portal Node
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Portals are memory mapped interfaces to BMan that allow low-latency, lock-less
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interaction by software running on processor cores, accelerators and network
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interfaces with the BMan
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PROPERTIES
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- compatible
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Usage: Required
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Value type: <stringlist>
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Definition: Must include "fsl,bman-portal-<hardware revision>"
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May include "fsl,<SoC>-bman-portal" or "fsl,bman-portal"
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- reg
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Usage: Required
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Value type: <prop-encoded-array>
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Definition: Two regions. The first is the cache-enabled region of
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the portal. The second is the cache-inhibited region of
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the portal
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- interrupts
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Usage: Required
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Value type: <prop-encoded-array>
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Definition: Standard property
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EXAMPLE
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The example below shows a (P4080) BMan portals container/bus node with two portals
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bman-portals@ff4000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0 0xf 0xf4000000 0x200000>;
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bman-portal@0 {
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compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
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reg = <0x0 0x4000>, <0x100000 0x1000>;
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interrupts = <105 2 0 0>;
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};
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bman-portal@4000 {
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compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
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reg = <0x4000 0x4000>, <0x101000 0x1000>;
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interrupts = <107 2 0 0>;
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};
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};
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