mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 10:14:25 +07:00
e886196469
Having introduced per-context seqno, we now have a means to identity progress across the system without feel of rollback as befell the global_seqno. That is we can program a MI_SEMAPHORE_WAIT operation in advance of submission safe in the knowledge that our target seqno and address is stable. However, since we are telling the GPU to busy-spin on the target address until it matches the signaling seqno, we only want to do so when we are sure that busy-spin will be completed quickly. To achieve this we only submit the request to HW once the signaler is itself executing (modulo preemption causing us to wait longer), and we only do so for default and above priority requests (so that idle priority tasks never themselves hog the GPU waiting for others). As might be reasonably expected, HW semaphores excel in inter-engine synchronisation microbenchmarks (where the 3x reduced latency / increased throughput more than offset the power cost of spinning on a second ring) and have significant improvement (can be up to ~10%, most see no change) for single clients that utilize multiple engines (typically media players and transcoders), without regressing multiple clients that can saturate the system or changing the power envelope dramatically. v3: Drop the older NEQ branch, now we pin the signaler's HWSP anyway. v4: Tell the world and include it as part of scheduler caps. Testcase: igt/gem_exec_whisper Testcase: igt/benchmarks/gem_wsim Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190301170901.8340-3-chris@chris-wilson.co.uk
548 lines
12 KiB
C
548 lines
12 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* (C) Copyright 2016 Intel Corporation
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*/
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#include <linux/slab.h>
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#include <linux/dma-fence.h>
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#include <linux/irq_work.h>
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#include <linux/reservation.h>
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#include "i915_sw_fence.h"
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#include "i915_selftest.h"
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#define I915_SW_FENCE_FLAG_ALLOC BIT(3) /* after WQ_FLAG_* for safety */
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static DEFINE_SPINLOCK(i915_sw_fence_lock);
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enum {
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DEBUG_FENCE_IDLE = 0,
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DEBUG_FENCE_NOTIFY,
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};
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static void *i915_sw_fence_debug_hint(void *addr)
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{
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return (void *)(((struct i915_sw_fence *)addr)->flags & I915_SW_FENCE_MASK);
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}
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#ifdef CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS
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static struct debug_obj_descr i915_sw_fence_debug_descr = {
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.name = "i915_sw_fence",
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.debug_hint = i915_sw_fence_debug_hint,
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};
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static inline void debug_fence_init(struct i915_sw_fence *fence)
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{
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debug_object_init(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_init_onstack(struct i915_sw_fence *fence)
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{
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debug_object_init_on_stack(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_activate(struct i915_sw_fence *fence)
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{
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debug_object_activate(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_set_state(struct i915_sw_fence *fence,
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int old, int new)
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{
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debug_object_active_state(fence, &i915_sw_fence_debug_descr, old, new);
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}
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static inline void debug_fence_deactivate(struct i915_sw_fence *fence)
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{
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debug_object_deactivate(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_destroy(struct i915_sw_fence *fence)
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{
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debug_object_destroy(fence, &i915_sw_fence_debug_descr);
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}
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static inline void debug_fence_free(struct i915_sw_fence *fence)
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{
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debug_object_free(fence, &i915_sw_fence_debug_descr);
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smp_wmb(); /* flush the change in state before reallocation */
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}
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static inline void debug_fence_assert(struct i915_sw_fence *fence)
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{
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debug_object_assert_init(fence, &i915_sw_fence_debug_descr);
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}
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#else
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static inline void debug_fence_init(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_init_onstack(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_activate(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_set_state(struct i915_sw_fence *fence,
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int old, int new)
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{
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}
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static inline void debug_fence_deactivate(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_destroy(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_free(struct i915_sw_fence *fence)
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{
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}
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static inline void debug_fence_assert(struct i915_sw_fence *fence)
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{
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}
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#endif
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static int __i915_sw_fence_notify(struct i915_sw_fence *fence,
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enum i915_sw_fence_notify state)
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{
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i915_sw_fence_notify_t fn;
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fn = (i915_sw_fence_notify_t)(fence->flags & I915_SW_FENCE_MASK);
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return fn(fence, state);
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}
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#ifdef CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS
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void i915_sw_fence_fini(struct i915_sw_fence *fence)
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{
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debug_fence_free(fence);
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}
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#endif
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static void __i915_sw_fence_wake_up_all(struct i915_sw_fence *fence,
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struct list_head *continuation)
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{
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wait_queue_head_t *x = &fence->wait;
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wait_queue_entry_t *pos, *next;
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unsigned long flags;
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debug_fence_deactivate(fence);
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atomic_set_release(&fence->pending, -1); /* 0 -> -1 [done] */
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/*
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* To prevent unbounded recursion as we traverse the graph of
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* i915_sw_fences, we move the entry list from this, the next ready
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* fence, to the tail of the original fence's entry list
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* (and so added to the list to be woken).
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*/
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spin_lock_irqsave_nested(&x->lock, flags, 1 + !!continuation);
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if (continuation) {
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list_for_each_entry_safe(pos, next, &x->head, entry) {
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if (pos->func == autoremove_wake_function)
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pos->func(pos, TASK_NORMAL, 0, continuation);
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else
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list_move_tail(&pos->entry, continuation);
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}
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} else {
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LIST_HEAD(extra);
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do {
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list_for_each_entry_safe(pos, next, &x->head, entry)
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pos->func(pos, TASK_NORMAL, 0, &extra);
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if (list_empty(&extra))
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break;
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list_splice_tail_init(&extra, &x->head);
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} while (1);
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}
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spin_unlock_irqrestore(&x->lock, flags);
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debug_fence_assert(fence);
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}
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static void __i915_sw_fence_complete(struct i915_sw_fence *fence,
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struct list_head *continuation)
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{
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debug_fence_assert(fence);
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if (!atomic_dec_and_test(&fence->pending))
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return;
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debug_fence_set_state(fence, DEBUG_FENCE_IDLE, DEBUG_FENCE_NOTIFY);
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if (__i915_sw_fence_notify(fence, FENCE_COMPLETE) != NOTIFY_DONE)
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return;
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debug_fence_set_state(fence, DEBUG_FENCE_NOTIFY, DEBUG_FENCE_IDLE);
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__i915_sw_fence_wake_up_all(fence, continuation);
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debug_fence_destroy(fence);
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__i915_sw_fence_notify(fence, FENCE_FREE);
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}
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void i915_sw_fence_complete(struct i915_sw_fence *fence)
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{
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debug_fence_assert(fence);
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if (WARN_ON(i915_sw_fence_done(fence)))
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return;
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__i915_sw_fence_complete(fence, NULL);
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}
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void i915_sw_fence_await(struct i915_sw_fence *fence)
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{
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debug_fence_assert(fence);
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WARN_ON(atomic_inc_return(&fence->pending) <= 1);
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}
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void __i915_sw_fence_init(struct i915_sw_fence *fence,
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i915_sw_fence_notify_t fn,
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const char *name,
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struct lock_class_key *key)
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{
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BUG_ON(!fn || (unsigned long)fn & ~I915_SW_FENCE_MASK);
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debug_fence_init(fence);
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__init_waitqueue_head(&fence->wait, name, key);
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atomic_set(&fence->pending, 1);
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fence->flags = (unsigned long)fn;
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}
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void i915_sw_fence_commit(struct i915_sw_fence *fence)
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{
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debug_fence_activate(fence);
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i915_sw_fence_complete(fence);
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}
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static int i915_sw_fence_wake(wait_queue_entry_t *wq, unsigned mode, int flags, void *key)
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{
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list_del(&wq->entry);
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__i915_sw_fence_complete(wq->private, key);
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if (wq->flags & I915_SW_FENCE_FLAG_ALLOC)
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kfree(wq);
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return 0;
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}
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static bool __i915_sw_fence_check_if_after(struct i915_sw_fence *fence,
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const struct i915_sw_fence * const signaler)
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{
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wait_queue_entry_t *wq;
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if (__test_and_set_bit(I915_SW_FENCE_CHECKED_BIT, &fence->flags))
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return false;
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if (fence == signaler)
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return true;
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list_for_each_entry(wq, &fence->wait.head, entry) {
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if (wq->func != i915_sw_fence_wake)
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continue;
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if (__i915_sw_fence_check_if_after(wq->private, signaler))
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return true;
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}
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return false;
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}
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static void __i915_sw_fence_clear_checked_bit(struct i915_sw_fence *fence)
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{
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wait_queue_entry_t *wq;
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if (!__test_and_clear_bit(I915_SW_FENCE_CHECKED_BIT, &fence->flags))
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return;
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list_for_each_entry(wq, &fence->wait.head, entry) {
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if (wq->func != i915_sw_fence_wake)
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continue;
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__i915_sw_fence_clear_checked_bit(wq->private);
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}
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}
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static bool i915_sw_fence_check_if_after(struct i915_sw_fence *fence,
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const struct i915_sw_fence * const signaler)
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{
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unsigned long flags;
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bool err;
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if (!IS_ENABLED(CONFIG_DRM_I915_SW_FENCE_CHECK_DAG))
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return false;
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spin_lock_irqsave(&i915_sw_fence_lock, flags);
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err = __i915_sw_fence_check_if_after(fence, signaler);
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__i915_sw_fence_clear_checked_bit(fence);
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spin_unlock_irqrestore(&i915_sw_fence_lock, flags);
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return err;
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}
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static int __i915_sw_fence_await_sw_fence(struct i915_sw_fence *fence,
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struct i915_sw_fence *signaler,
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wait_queue_entry_t *wq, gfp_t gfp)
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{
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unsigned long flags;
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int pending;
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debug_fence_assert(fence);
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might_sleep_if(gfpflags_allow_blocking(gfp));
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if (i915_sw_fence_done(signaler))
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return 0;
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debug_fence_assert(signaler);
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/* The dependency graph must be acyclic. */
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if (unlikely(i915_sw_fence_check_if_after(fence, signaler)))
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return -EINVAL;
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pending = 0;
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if (!wq) {
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wq = kmalloc(sizeof(*wq), gfp);
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if (!wq) {
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if (!gfpflags_allow_blocking(gfp))
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return -ENOMEM;
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i915_sw_fence_wait(signaler);
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return 0;
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}
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pending |= I915_SW_FENCE_FLAG_ALLOC;
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}
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INIT_LIST_HEAD(&wq->entry);
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wq->flags = pending;
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wq->func = i915_sw_fence_wake;
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wq->private = fence;
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i915_sw_fence_await(fence);
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spin_lock_irqsave(&signaler->wait.lock, flags);
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if (likely(!i915_sw_fence_done(signaler))) {
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__add_wait_queue_entry_tail(&signaler->wait, wq);
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pending = 1;
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} else {
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i915_sw_fence_wake(wq, 0, 0, NULL);
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pending = 0;
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}
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spin_unlock_irqrestore(&signaler->wait.lock, flags);
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return pending;
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}
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int i915_sw_fence_await_sw_fence(struct i915_sw_fence *fence,
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struct i915_sw_fence *signaler,
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wait_queue_entry_t *wq)
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{
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return __i915_sw_fence_await_sw_fence(fence, signaler, wq, 0);
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}
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int i915_sw_fence_await_sw_fence_gfp(struct i915_sw_fence *fence,
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struct i915_sw_fence *signaler,
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gfp_t gfp)
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{
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return __i915_sw_fence_await_sw_fence(fence, signaler, NULL, gfp);
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}
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struct i915_sw_dma_fence_cb {
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struct dma_fence_cb base;
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struct i915_sw_fence *fence;
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};
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struct i915_sw_dma_fence_cb_timer {
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struct i915_sw_dma_fence_cb base;
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struct dma_fence *dma;
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struct timer_list timer;
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struct irq_work work;
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struct rcu_head rcu;
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};
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static void dma_i915_sw_fence_wake(struct dma_fence *dma,
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struct dma_fence_cb *data)
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{
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struct i915_sw_dma_fence_cb *cb = container_of(data, typeof(*cb), base);
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i915_sw_fence_complete(cb->fence);
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kfree(cb);
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}
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static void timer_i915_sw_fence_wake(struct timer_list *t)
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{
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struct i915_sw_dma_fence_cb_timer *cb = from_timer(cb, t, timer);
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struct i915_sw_fence *fence;
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fence = xchg(&cb->base.fence, NULL);
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if (!fence)
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return;
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pr_notice("Asynchronous wait on fence %s:%s:%llx timed out (hint:%pS)\n",
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cb->dma->ops->get_driver_name(cb->dma),
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cb->dma->ops->get_timeline_name(cb->dma),
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cb->dma->seqno,
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i915_sw_fence_debug_hint(fence));
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i915_sw_fence_complete(fence);
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}
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static void dma_i915_sw_fence_wake_timer(struct dma_fence *dma,
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struct dma_fence_cb *data)
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{
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struct i915_sw_dma_fence_cb_timer *cb =
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container_of(data, typeof(*cb), base.base);
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struct i915_sw_fence *fence;
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fence = xchg(&cb->base.fence, NULL);
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if (fence)
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i915_sw_fence_complete(fence);
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irq_work_queue(&cb->work);
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}
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static void irq_i915_sw_fence_work(struct irq_work *wrk)
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{
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struct i915_sw_dma_fence_cb_timer *cb =
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container_of(wrk, typeof(*cb), work);
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del_timer_sync(&cb->timer);
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dma_fence_put(cb->dma);
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kfree_rcu(cb, rcu);
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}
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int i915_sw_fence_await_dma_fence(struct i915_sw_fence *fence,
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struct dma_fence *dma,
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unsigned long timeout,
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gfp_t gfp)
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{
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struct i915_sw_dma_fence_cb *cb;
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dma_fence_func_t func;
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int ret;
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debug_fence_assert(fence);
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might_sleep_if(gfpflags_allow_blocking(gfp));
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if (dma_fence_is_signaled(dma))
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return 0;
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cb = kmalloc(timeout ?
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sizeof(struct i915_sw_dma_fence_cb_timer) :
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sizeof(struct i915_sw_dma_fence_cb),
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gfp);
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if (!cb) {
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if (!gfpflags_allow_blocking(gfp))
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return -ENOMEM;
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return dma_fence_wait(dma, false);
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}
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cb->fence = fence;
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i915_sw_fence_await(fence);
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func = dma_i915_sw_fence_wake;
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if (timeout) {
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struct i915_sw_dma_fence_cb_timer *timer =
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container_of(cb, typeof(*timer), base);
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timer->dma = dma_fence_get(dma);
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init_irq_work(&timer->work, irq_i915_sw_fence_work);
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timer_setup(&timer->timer,
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timer_i915_sw_fence_wake, TIMER_IRQSAFE);
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mod_timer(&timer->timer, round_jiffies_up(jiffies + timeout));
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func = dma_i915_sw_fence_wake_timer;
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}
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ret = dma_fence_add_callback(dma, &cb->base, func);
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if (ret == 0) {
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ret = 1;
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} else {
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func(dma, &cb->base);
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if (ret == -ENOENT) /* fence already signaled */
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ret = 0;
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}
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return ret;
|
|
}
|
|
|
|
int i915_sw_fence_await_reservation(struct i915_sw_fence *fence,
|
|
struct reservation_object *resv,
|
|
const struct dma_fence_ops *exclude,
|
|
bool write,
|
|
unsigned long timeout,
|
|
gfp_t gfp)
|
|
{
|
|
struct dma_fence *excl;
|
|
int ret = 0, pending;
|
|
|
|
debug_fence_assert(fence);
|
|
might_sleep_if(gfpflags_allow_blocking(gfp));
|
|
|
|
if (write) {
|
|
struct dma_fence **shared;
|
|
unsigned int count, i;
|
|
|
|
ret = reservation_object_get_fences_rcu(resv,
|
|
&excl, &count, &shared);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < count; i++) {
|
|
if (shared[i]->ops == exclude)
|
|
continue;
|
|
|
|
pending = i915_sw_fence_await_dma_fence(fence,
|
|
shared[i],
|
|
timeout,
|
|
gfp);
|
|
if (pending < 0) {
|
|
ret = pending;
|
|
break;
|
|
}
|
|
|
|
ret |= pending;
|
|
}
|
|
|
|
for (i = 0; i < count; i++)
|
|
dma_fence_put(shared[i]);
|
|
kfree(shared);
|
|
} else {
|
|
excl = reservation_object_get_excl_rcu(resv);
|
|
}
|
|
|
|
if (ret >= 0 && excl && excl->ops != exclude) {
|
|
pending = i915_sw_fence_await_dma_fence(fence,
|
|
excl,
|
|
timeout,
|
|
gfp);
|
|
if (pending < 0)
|
|
ret = pending;
|
|
else
|
|
ret |= pending;
|
|
}
|
|
|
|
dma_fence_put(excl);
|
|
|
|
return ret;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
|
|
#include "selftests/lib_sw_fence.c"
|
|
#include "selftests/i915_sw_fence.c"
|
|
#endif
|