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0767211bea
Only the main UART and the memory node information are added. Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
32 lines
663 B
Plaintext
32 lines
663 B
Plaintext
/*
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* Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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/include/ "imx31.dtsi"
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/ {
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model = "Buglabs i.MX31 Bug 1.x";
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compatible = "fsl,imx31-bug", "fsl,imx31";
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memory {
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reg = <0x80000000 0x8000000>; /* 128M */
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};
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soc {
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aips@43f00000 { /* AIPS1 */
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uart5: serial@43fb4000 {
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fsl,uart-has-rtscts;
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status = "okay";
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};
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};
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};
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};
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