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c4353016da
The hardware only takes 27 bits for the offset, so larger offsets are truncated, and the hardware cursor shows random bits other than the intended ones. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46796 Cc: stable@vger.kernel.org Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
166 lines
5.6 KiB
C
166 lines
5.6 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#ifndef __RADEON_OBJECT_H__
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#define __RADEON_OBJECT_H__
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#include <drm/radeon_drm.h>
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#include "radeon.h"
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/**
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* radeon_mem_type_to_domain - return domain corresponding to mem_type
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* @mem_type: ttm memory type
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*
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* Returns corresponding domain of the ttm mem_type
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*/
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static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
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{
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switch (mem_type) {
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case TTM_PL_VRAM:
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return RADEON_GEM_DOMAIN_VRAM;
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case TTM_PL_TT:
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return RADEON_GEM_DOMAIN_GTT;
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case TTM_PL_SYSTEM:
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return RADEON_GEM_DOMAIN_CPU;
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default:
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break;
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}
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return 0;
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}
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int radeon_bo_reserve(struct radeon_bo *bo, bool no_wait);
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static inline void radeon_bo_unreserve(struct radeon_bo *bo)
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{
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ttm_bo_unreserve(&bo->tbo);
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}
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/**
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* radeon_bo_gpu_offset - return GPU offset of bo
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* @bo: radeon object for which we query the offset
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*
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* Returns current GPU offset of the object.
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*
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* Note: object should either be pinned or reserved when calling this
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* function, it might be useful to add check for this for debugging.
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*/
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static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
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{
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return bo->tbo.offset;
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}
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static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
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{
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return bo->tbo.num_pages << PAGE_SHIFT;
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}
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static inline bool radeon_bo_is_reserved(struct radeon_bo *bo)
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{
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return !!atomic_read(&bo->tbo.reserved);
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}
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static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo)
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{
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return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
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}
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static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
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{
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return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
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}
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/**
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* radeon_bo_mmap_offset - return mmap offset of bo
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* @bo: radeon object for which we query the offset
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*
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* Returns mmap offset of the object.
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*
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* Note: addr_space_offset is constant after ttm bo init thus isn't protected
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* by any lock.
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*/
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static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
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{
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return bo->tbo.addr_space_offset;
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}
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extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
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bool no_wait);
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extern int radeon_bo_create(struct radeon_device *rdev,
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unsigned long size, int byte_align,
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bool kernel, u32 domain,
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struct radeon_bo **bo_ptr);
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extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
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extern void radeon_bo_kunmap(struct radeon_bo *bo);
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extern void radeon_bo_unref(struct radeon_bo **bo);
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extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
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extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
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u64 max_offset, u64 *gpu_addr);
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extern int radeon_bo_unpin(struct radeon_bo *bo);
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extern int radeon_bo_evict_vram(struct radeon_device *rdev);
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extern void radeon_bo_force_delete(struct radeon_device *rdev);
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extern int radeon_bo_init(struct radeon_device *rdev);
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extern void radeon_bo_fini(struct radeon_device *rdev);
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extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
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struct list_head *head);
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extern int radeon_bo_list_validate(struct list_head *head);
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extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
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struct vm_area_struct *vma);
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extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
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u32 tiling_flags, u32 pitch);
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extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
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u32 *tiling_flags, u32 *pitch);
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extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
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bool force_drop);
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extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
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struct ttm_mem_reg *mem);
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extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
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extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
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extern struct radeon_bo_va *radeon_bo_va(struct radeon_bo *rbo,
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struct radeon_vm *vm);
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/*
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* sub allocation
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*/
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extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager,
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unsigned size, u32 domain);
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extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager);
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extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager);
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extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager);
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extern int radeon_sa_bo_new(struct radeon_device *rdev,
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struct radeon_sa_manager *sa_manager,
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struct radeon_sa_bo *sa_bo,
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unsigned size, unsigned align);
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extern void radeon_sa_bo_free(struct radeon_device *rdev,
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struct radeon_sa_bo *sa_bo);
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#endif
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