Sebastian Hesselbarth e68f31f452 ARM: 7922/1: l2x0: add Marvell Tauros3 support ... This adds support for the Marvell Tauros3 cache controller which is compatible with pl310 cache controller but broadcasts L1 cache operations to L2 cache. While updating the binding documentation, clean up the list of possible compatibles. Also reorder driver compatibles to allow non-ARM derivated to be compatible to ARM cache controller compatibles. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2013-12-29 12:32:47 +00:00
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bindings	ARM: 7922/1: l2x0: add Marvell Tauros3 support	2013-12-29 12:32:47 +00:00
00-INDEX
booting-without-of.txt	sun.com documentation fixes	2013-02-21 17:22:20 -08:00
usage-model.txt	doc: device tree: clarify stuff in usage-model.txt.	2013-06-18 13:46:27 +02:00