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From LPC18xx and LPC43xx User Manuals the GPIO controller consists of the following weakly connected blocks: * GPIO pin interrupt block at 0x40087000, * GPIO GROUP0 interrupt block at 0x40088000, * GPIO GROUP1 interrupt block at 0x40089000, * GPIO port block at 0x400F4000. While all 4 sub-controller blocks have their own I/O addresses, moreover all 3 interrupt blocks are APB0 peripherals and high-speed GPIO block is an AHB slave, according to the hardware manual interrupt controllers and GPIO controller block are seen as a single device, all 4 sub-controllers have the shared reset signal RGU #28 and the same shared clock to access registers CLK_Mx_GPIO on CCU1. The change adds descriptions of the currently missing interrupt controller blocks found on GPIO controller, new added properties are 'reg-names', 'resets', 'interrupt-controller' and '#interrupt-cells', also the example is updated to reflect the changes in device tree binding description. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
60 lines
1.9 KiB
Plaintext
60 lines
1.9 KiB
Plaintext
NXP LPC18xx/43xx GPIO controller Device Tree Bindings
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-----------------------------------------------------
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Required properties:
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- compatible : Should be "nxp,lpc1850-gpio"
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- reg : List of addresses and lengths of the GPIO controller
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register sets
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- reg-names : Should be "gpio", "gpio-pin-ic", "gpio-group0-ic" and
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"gpio-gpoup1-ic"
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- clocks : Phandle and clock specifier pair for GPIO controller
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- resets : Phandle and reset specifier pair for GPIO controller
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- gpio-controller : Marks the device node as a GPIO controller
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- #gpio-cells : Should be two:
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- The first cell is the GPIO line number
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- The second cell is used to specify polarity
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- interrupt-controller : Marks the device node as an interrupt controller
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- #interrupt-cells : Should be two:
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- The first cell is an interrupt number within
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0..9 range, for GPIO pin interrupts it is equal
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to 'nxp,gpio-pin-interrupt' property value of
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GPIO pin configuration, 8 is for GPIO GROUP0
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interrupt, 9 is for GPIO GROUP1 interrupt
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- The second cell is used to specify interrupt type
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Optional properties:
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- gpio-ranges : Mapping between GPIO and pinctrl
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Example:
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#define LPC_GPIO(port, pin) (port * 32 + pin)
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#define LPC_PIN(port, pin) (0x##port * 32 + pin)
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gpio: gpio@400f4000 {
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compatible = "nxp,lpc1850-gpio";
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reg = <0x400f4000 0x4000>, <0x40087000 0x1000>,
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<0x40088000 0x1000>, <0x40089000 0x1000>;
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reg-names = "gpio", "gpio-pin-ic",
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"gpio-group0-ic", "gpio-gpoup1-ic";
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clocks = <&ccu1 CLK_CPU_GPIO>;
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resets = <&rgu 28>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-ranges = <&pinctrl LPC_GPIO(0,0) LPC_PIN(0,0) 2>,
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...
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<&pinctrl LPC_GPIO(7,19) LPC_PIN(f,5) 7>;
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};
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gpio_joystick {
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compatible = "gpio-keys";
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...
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button0 {
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...
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interrupt-parent = <&gpio>;
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interrupts = <1 IRQ_TYPE_EDGE_BOTH>;
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gpios = <&gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW>;
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};
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};
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